esp-idf/components/esp_hw_support/port/esp32s3
Omar Chebib 8fae0f0753 G0: Support Xtensa targets for G0-only compilation
G0-only example now supports Xtensa targets. This means that G0 layer
does not depend on G1+ layers anymore
2022-06-20 11:34:20 +00:00
..
private_include G0: Support Xtensa targets for G0-only compilation 2022-06-20 11:34:20 +00:00
chip_info.c esp_hw_support: update copyright notice 4 2021-08-10 13:31:53 +02:00
CMakeLists.txt System/Security: Memprot API unified (ESP32S3) 2022-06-20 02:36:44 +00:00
esp_crypto_lock.c Digital Signature support for S3 2021-09-02 11:59:24 +05:30
esp_ds.c global: make periph enable/disable APIs private 2021-11-08 10:37:47 +08:00
esp_hmac.c global: make periph enable/disable APIs private 2021-11-08 10:37:47 +08:00
esp_memprot.c System/Security: Memprot API unified (ESP32S3) 2022-06-20 02:36:44 +00:00
Kconfig.mac esp32: move mac target specific configs 2021-03-31 19:17:33 +08:00
Kconfig.rtc clk_tree: add initial docs for clock tree 2022-05-24 22:59:51 +08:00
rtc_clk_init.c rtc_clk: Fix rtc8m calibration failure after cpu/core reset 2022-06-13 17:47:51 +08:00
rtc_clk.c clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem 2022-06-13 17:47:50 +08:00
rtc_init.c rtc_clk: Clean up some clock related enum and macro in soc/rtc.h, replace with new ones in 2022-05-24 22:59:41 +08:00
rtc_pm.c modify voltage param to fit all mode of S3 2022-06-01 21:03:54 +08:00
rtc_sleep.c Merge branch 'bugfix/s3_sleep_voltage' into 'master' 2022-06-04 00:47:32 +08:00
rtc_time.c rtc_clk: Fix rtc8m calibration failure after cpu/core reset 2022-06-13 17:47:51 +08:00