esp-idf

mirror of https://github.com/espressif/esp-idf.git synced 2024-10-05 20:47:46 -04:00

History

KonstantinKondrashov 0a71dce1ef reset_reasons: EFUSE_RST is treated as POWERON_RST ESP32 does not have the EFUSE_RST, the rest chips has this reset reason.		2022-06-22 17:56:32 +08:00
..
esp32	uart: fixed incorrect channel number on ESP32S2, S3 and C3	2022-03-02 02:56:23 +08:00
esp32c3	reset_reasons: EFUSE_RST is treated as POWERON_RST	2022-06-22 17:56:32 +08:00
esp32s2	rmt: fix error in rmt register file	2022-06-18 13:51:53 +00:00
esp32s3	Merge branch 'bugfix/i2c_timeout_issue_v4.3' into 'release/v4.3'	2022-06-09 11:10:57 +08:00
include/soc	soc: Added support for specify the maximum descriptor length when setting up the DMA descriptor link	2022-01-06 08:11:57 +08:00
CMakeLists.txt	soc: move implementations to esp_hw_support	2020-10-28 22:38:50 +08:00
component.mk	Whitespace: Automated whitespace fixes (large commit)	2020-11-11 07:36:35 +00:00
linker.lf	soc: move implementations to esp_hw_support	2020-10-28 22:38:50 +08:00
lldesc.c	soc: Added support for specify the maximum descriptor length when setting up the DMA descriptor link	2022-01-06 08:11:57 +08:00
memory_layout_utils.c	esp_rom: Add initial ESP32-C3 support	2020-11-30 11:12:56 +11:00
README.md	soc: descriptive part occupy whole component	2020-10-28 07:21:29 +08:00
soc_include_legacy_warn.c	Whitespace: Automated whitespace fixes (large commit)	2020-11-11 07:36:35 +00:00

README.md

`soc`

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware