esp-idf/components/soc
Zim Kalinowski 1f0d8585ca Merge branch 'feature/update_efuses_for_esp32s2_v4.3' into 'release/v4.3'
efuse(esp32s2): Added flash_ver, psram_ver, pkg_ver efuses (v4.3)

See merge request espressif/esp-idf!14770
2021-09-10 04:21:54 +00:00
..
esp32 component/bt: add local irk to controller 2021-08-06 18:19:25 +08:00
esp32c3 component/bt: add local irk to controller 2021-08-06 18:19:25 +08:00
esp32s2 efuse(esp32s2): Added flash_ver, psram_ver, pkg_ver efuses 2021-08-12 18:25:07 +05:00
esp32s3 idf_size.py: fixed diram counted twice issue, and improve display 2021-09-01 16:36:47 +02:00
include/soc espcoredump: Fix bugs related to (fake) stacks 2021-05-28 01:58:09 +00:00
CMakeLists.txt soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00
component.mk Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
linker.lf soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00
lldesc.c soc: descriptive part occupy whole component 2020-10-28 07:21:29 +08:00
memory_layout_utils.c esp_rom: Add initial ESP32-C3 support 2020-11-30 11:12:56 +11:00
README.md soc: descriptive part occupy whole component 2020-10-28 07:21:29 +08:00
soc_include_legacy_warn.c Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware