| .. |
|
adc_channel.h
|
soc: descriptive part occupy whole component
|
2020-10-28 07:21:29 +08:00 |
|
apb_ctrl_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
apb_ctrl_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
apb_saradc_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
apb_saradc_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
assist_debug_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
assist_debug_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
bb_reg.h
|
soc: descriptive part occupy whole component
|
2020-10-28 07:21:29 +08:00 |
|
boot_mode.h
|
soc: descriptive part occupy whole component
|
2020-10-28 07:21:29 +08:00 |
|
brownout_caps.h
|
soc: descriptive part occupy whole component
|
2020-10-28 07:21:29 +08:00 |
|
cache_memory.h
|
soc: descriptive part occupy whole component
|
2020-10-28 07:21:29 +08:00 |
|
clkout_channel.h
|
soc: descriptive part occupy whole component
|
2020-10-28 07:21:29 +08:00 |
|
cpu_caps.h
|
doc: Add performance guides for execuion speed, binary size, RAM usage
|
2021-06-03 13:55:34 +10:00 |
|
cpu.h
|
soc: add soc headers from S3 fpga bringup branch
|
2021-03-17 18:47:51 +08:00 |
|
dport_access.h
|
soc: descriptive part occupy whole component
|
2020-10-28 07:21:29 +08:00 |
|
dport_reg.h
|
trax: Adds ESP32-S3 support
|
2021-10-22 23:36:28 +03:00 |
|
efuse_reg.h
|
efuse: remove DIS_RTC_RAM_BOOT efuse bit
|
2021-09-18 14:58:43 +08:00 |
|
efuse_struct.h
|
efuse: remove DIS_RTC_RAM_BOOT efuse bit
|
2021-09-18 14:58:43 +08:00 |
|
extmem_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
extmem_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
fe_reg.h
|
soc: descriptive part occupy whole component
|
2020-10-28 07:21:29 +08:00 |
|
gdma_channel.h
|
gdma: update DMA soc data for esp32-s3
|
2021-07-16 14:47:09 +08:00 |
|
gdma_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
gdma_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
gpio_caps.h
|
light sleep: add gpio configure workaround at slept status for esp32s3
|
2021-07-14 21:57:21 +08:00 |
|
gpio_pins.h
|
Whitespace: Automated whitespace fixes (large commit)
|
2020-11-11 07:36:35 +00:00 |
|
gpio_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
gpio_sd_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
gpio_sd_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
gpio_sig_map.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
gpio_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
hinf_reg.h
|
soc: descriptive part occupy whole component
|
2020-10-28 07:21:29 +08:00 |
|
hinf_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
host_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
host_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
hwcrypto_reg.h
|
hmac: Added Downstream JTAG enable mode for esp32c3 and esp32s3
|
2021-09-06 11:06:50 +05:30 |
|
i2c_caps.h
|
i2c: Add supports on esp32s3
|
2020-11-12 11:32:45 +08:00 |
|
i2c_reg.h
|
i2c: modify examples to work out of the box on ESP32S3
|
2021-07-21 11:04:16 +08:00 |
|
i2c_struct.h
|
i2c: modify examples to work out of the box on ESP32S3
|
2021-07-21 11:04:16 +08:00 |
|
i2s_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
i2s_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
interrupt_core0_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
interrupt_core0_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
interrupt_core1_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
interrupt_core1_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
interrupt_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
interrupt_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
io_mux_reg.h
|
uart: uart_set_pin function will now use IOMUX whenever possible
|
2021-08-04 12:48:30 +08:00 |
|
lcd_cam_reg.h
|
lcd: unify callback prototype
|
2021-10-02 14:23:31 +08:00 |
|
lcd_cam_struct.h
|
lcd: unify callback prototype
|
2021-10-02 14:23:31 +08:00 |
|
ledc_caps.h
|
soc: Add initial ESP32-C3 support
|
2020-11-30 11:12:56 +11:00 |
|
ledc_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
ledc_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
mcpwm_reg.h
|
mcpwm: update register file according to TRM
|
2021-08-24 15:38:46 +08:00 |
|
mcpwm_struct.h
|
mcpwm: rename keyword 'operator' which is not valid in cpp
|
2021-09-10 12:41:42 +08:00 |
|
mmu.h
|
soc: Remove cache constants from soc.h
|
2020-12-17 15:34:13 +11:00 |
|
mpu_caps.h
|
hal: mpu: fix signed overflow error
|
2021-04-22 23:33:47 +02:00 |
|
nrx_reg.h
|
soc: descriptive part occupy whole component
|
2020-10-28 07:21:29 +08:00 |
|
pcnt_caps.h
|
soc: add soc headers from S3 fpga bringup branch
|
2021-03-17 18:47:51 +08:00 |
|
pcnt_reg.h
|
pcnt: update pcnt soc data for all targets
|
2021-08-10 17:19:21 +08:00 |
|
pcnt_struct.h
|
pcnt: update pcnt soc data for all targets
|
2021-08-10 17:19:21 +08:00 |
|
peri_backup_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
peri_backup_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
periph_defs.h
|
[esp_hw_support]: HMAC upstream support for S3
|
2021-08-13 12:01:06 +08:00 |
|
reset_reasons.h
|
update reset reason for c3/s3/h2
|
2021-08-13 17:45:53 +08:00 |
|
rmt_reg.h
|
rmt: update soc data with regtool for esp32s3
|
2021-06-22 15:29:11 +08:00 |
|
rmt_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
rtc_cntl_reg.h
|
touch sensor: update copyright notice
|
2021-10-08 11:45:57 +08:00 |
|
rtc_cntl_struct.h
|
touch sensor: update copyright notice
|
2021-10-08 11:45:57 +08:00 |
|
rtc_gpio_channel.h
|
soc: descriptive part occupy whole component
|
2020-10-28 07:21:29 +08:00 |
|
rtc_i2c_reg.h
|
i2c: modify examples to work out of the box on ESP32S3
|
2021-07-21 11:04:16 +08:00 |
|
rtc_i2c_struct.h
|
i2c: modify examples to work out of the box on ESP32S3
|
2021-07-21 11:04:16 +08:00 |
|
rtc_io_caps.h
|
soc: Add initial ESP32-C3 support
|
2020-11-30 11:12:56 +11:00 |
|
rtc_io_channel.h
|
soc: descriptive part occupy whole component
|
2020-10-28 07:21:29 +08:00 |
|
rtc_io_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
rtc_io_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
rtc.h
|
touch sensor: update copyright notice
|
2021-10-08 11:45:57 +08:00 |
|
sdio_slave_pins.h
|
soc: descriptive part occupy whole component
|
2020-10-28 07:21:29 +08:00 |
|
sdmmc_pins.h
|
soc: add esp32s3 sdmmc support
|
2021-05-10 23:21:27 +02:00 |
|
sdmmc_reg.h
|
soc: descriptive part occupy whole component
|
2020-10-28 07:21:29 +08:00 |
|
sdmmc_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
sens_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
sens_struct.h
|
touch sensor: update copyright notice
|
2021-10-08 11:45:57 +08:00 |
|
sensitive_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
sensitive_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
sigmadelta_caps.h
|
soc: add soc headers from S3 fpga bringup branch
|
2021-03-17 18:47:51 +08:00 |
|
soc_caps.h
|
bootloader: Simplify multi-chip control logic of the cache
|
2021-10-21 18:09:37 +08:00 |
|
soc_pins.h
|
touch sensor: update copyright notice
|
2021-10-08 11:45:57 +08:00 |
|
soc_ulp.h
|
soc: descriptive part occupy whole component
|
2020-10-28 07:21:29 +08:00 |
|
soc.h
|
esp_common: Add API for IPC to run small pieces of code on the other CPU, in the context of the level 4 interrupt
|
2021-08-03 14:35:29 +08:00 |
|
spi_mem_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
spi_mem_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
spi_pins.h
|
spi_master:support octal mode for esp32s2 and esp32s3
|
2021-08-19 16:40:22 +08:00 |
|
spi_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
spi_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
syscon_reg.h
|
rename APB_CTRL ro SYS_CON
|
2021-09-16 20:57:57 +08:00 |
|
syscon_struct.h
|
rename APB_CTRL ro SYS_CON
|
2021-09-16 20:57:57 +08:00 |
|
system_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
system_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
systimer_reg.h
|
systimer: update soc data
|
2021-04-22 21:07:35 +08:00 |
|
systimer_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
timer_group_reg.h
|
timer group: add timer group and WDT support for ESP32S3
|
2021-07-06 16:21:43 +08:00 |
|
timer_group_struct.h
|
gptimer: clean up hal and ll for driver-ng
|
2021-10-20 18:40:08 +08:00 |
|
touch_channel.h
|
soc: descriptive part occupy whole component
|
2020-10-28 07:21:29 +08:00 |
|
touch_sensor_channel.h
|
touch sensor: update copyright notice
|
2021-10-08 11:45:57 +08:00 |
|
touch_sensor_pins.h
|
touch sensor: update copyright notice
|
2021-10-08 11:45:57 +08:00 |
|
tracemem_config.h
|
trax: Adds ESP32-S3 support
|
2021-10-22 23:36:28 +03:00 |
|
twai_caps.h
|
Update TWAI driver docs and registers for esp32c3
|
2021-04-14 15:00:07 +08:00 |
|
twai_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
uart_caps.h
|
light sleep: add uart new final state machine support for esp32s3
|
2021-07-20 11:27:14 +08:00 |
|
uart_channel.h
|
soc: descriptive part occupy whole component
|
2020-10-28 07:21:29 +08:00 |
|
uart_pins.h
|
uart: uart_set_pin function will now use IOMUX whenever possible
|
2021-08-04 12:48:30 +08:00 |
|
uart_reg.h
|
uart: update register headers and examples for S3
|
2021-07-22 12:05:49 +08:00 |
|
uart_struct.h
|
uart: update register headers and examples for S3
|
2021-07-22 12:05:49 +08:00 |
|
uhci_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
uhci_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
usb_caps.h
|
soc: add soc headers from S3 fpga bringup branch
|
2021-03-17 18:47:51 +08:00 |
|
usb_device_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
usb_pins.h
|
soc: add soc headers from S3 fpga bringup branch
|
2021-03-17 18:47:51 +08:00 |
|
usb_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
usb_serial_jtag_reg.h
|
usb_serial_jtag: add initial support for S3 (including flashing, monitoring, writing, and reading) but console is not avaliable now
|
2021-06-18 12:42:41 +08:00 |
|
usb_serial_jtag_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
usb_struct.h
|
Merge branch 'bugfix/usb_device_struct_cleanup' into 'master'
|
2021-07-19 04:23:20 +00:00 |
|
usb_types.h
|
soc: add soc headers from S3 fpga bringup branch
|
2021-03-17 18:47:51 +08:00 |
|
usb_wrap_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
usb_wrap_struct.h
|
usb: Add usb_phy driver to support operations on USB PHY
|
2021-09-13 12:39:56 +08:00 |
|
usbh_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
|
wdev_reg.h
|
soc: descriptive part occupy whole component
|
2020-10-28 07:21:29 +08:00 |
|
world_controller_reg.h
|
soc: update the csv headers for esp32s3
|
2021-06-16 18:04:18 +08:00 |
|
world_controller_struct.h
|
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
|
2021-08-30 13:50:58 +08:00 |
