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alex
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esp-idf
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0a71dce1ef
esp-idf
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components
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esp_system
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port
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soc
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KonstantinKondrashov
0a71dce1ef
reset_reasons: EFUSE_RST is treated as POWERON_RST
...
ESP32 does not have the EFUSE_RST, the rest chips has this reset reason.
2022-06-22 17:56:32 +08:00
..
esp32
esp_system: fix the bug that some peripheral clocks are being disabled during cpu reset for esp32s2, c3, s3
2021-10-12 11:37:17 +08:00
esp32c3
reset_reasons: EFUSE_RST is treated as POWERON_RST
2022-06-22 17:56:32 +08:00
esp32s2
Systimer reset alternative on S2 (and others) (v4.3)
2021-10-28 08:00:28 +00:00
esp32s3
esp_system: fix the bug that some peripheral clocks are being disabled during cpu reset for esp32s2, c3, s3
2021-10-12 11:37:17 +08:00