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5276cd4f1d
Increase LP_UART_EMPTY_THRESH_DEFAULT value to 4. The original value could cause the FIFO become empty before filling next data into the FIFO when the buadrate is high. TX_DONE interrupt would raise before actual transmission complete in such case. |
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.. | ||
main | ||
CMakeLists.txt | ||
pytest_uart.py | ||
README.md | ||
sdkconfig.ci.iram_safe | ||
sdkconfig.ci.release | ||
sdkconfig.defaults | ||
sdkconfig.defaults.esp32s3 |
Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
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