mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
469 lines
19 KiB
C
469 lines
19 KiB
C
/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdlib.h>
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#include <stdarg.h>
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#include <sys/cdefs.h>
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#include "sdkconfig.h"
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#if CONFIG_MCPWM_ENABLE_DEBUG_LOG
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// The local log level must be defined before including esp_log.h
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// Set the maximum log level for this source file
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#define LOG_LOCAL_LEVEL ESP_LOG_DEBUG
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#endif
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#include "freertos/FreeRTOS.h"
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#include "esp_attr.h"
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#include "esp_check.h"
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#include "esp_private/esp_clk.h"
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#include "esp_err.h"
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#include "esp_log.h"
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#include "esp_memory_utils.h"
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#include "soc/soc_caps.h"
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#include "soc/mcpwm_periph.h"
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#include "hal/mcpwm_ll.h"
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#include "driver/mcpwm_cap.h"
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#include "driver/gpio.h"
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#include "mcpwm_private.h"
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static const char *TAG = "mcpwm";
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static void mcpwm_capture_default_isr(void *args);
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static esp_err_t mcpwm_cap_timer_register_to_group(mcpwm_cap_timer_t *cap_timer, int group_id)
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{
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mcpwm_group_t *group = mcpwm_acquire_group_handle(group_id);
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ESP_RETURN_ON_FALSE(group, ESP_ERR_NO_MEM, TAG, "no mem for group (%d)", group_id);
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bool new_timer = false;
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portENTER_CRITICAL(&group->spinlock);
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if (!group->cap_timer) {
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group->cap_timer = cap_timer;
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new_timer = true;
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}
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portEXIT_CRITICAL(&group->spinlock);
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if (!new_timer) {
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mcpwm_release_group_handle(group);
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group = NULL;
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} else {
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cap_timer->group = group;
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}
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ESP_RETURN_ON_FALSE(new_timer, ESP_ERR_NOT_FOUND, TAG, "no free cap timer in group (%d)", group_id);
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return ESP_OK;
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}
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static void mcpwm_cap_timer_unregister_from_group(mcpwm_cap_timer_t *cap_timer)
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{
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mcpwm_group_t *group = cap_timer->group;
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portENTER_CRITICAL(&group->spinlock);
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group->cap_timer = NULL;
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portEXIT_CRITICAL(&group->spinlock);
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// capture timer has a reference on group, release it now
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mcpwm_release_group_handle(group);
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}
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static esp_err_t mcpwm_cap_timer_destory(mcpwm_cap_timer_t *cap_timer)
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{
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if (cap_timer->pm_lock) {
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ESP_RETURN_ON_ERROR(esp_pm_lock_delete(cap_timer->pm_lock), TAG, "delete pm_lock failed");
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}
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if (cap_timer->group) {
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mcpwm_cap_timer_unregister_from_group(cap_timer);
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}
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free(cap_timer);
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return ESP_OK;
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}
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esp_err_t mcpwm_new_capture_timer(const mcpwm_capture_timer_config_t *config, mcpwm_cap_timer_handle_t *ret_cap_timer)
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{
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#if CONFIG_MCPWM_ENABLE_DEBUG_LOG
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esp_log_level_set(TAG, ESP_LOG_DEBUG);
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#endif
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esp_err_t ret = ESP_OK;
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mcpwm_cap_timer_t *cap_timer = NULL;
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ESP_GOTO_ON_FALSE(config && ret_cap_timer, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
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ESP_GOTO_ON_FALSE(config->group_id < SOC_MCPWM_GROUPS && config->group_id >= 0, ESP_ERR_INVALID_ARG,
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err, TAG, "invalid group ID:%d", config->group_id);
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cap_timer = heap_caps_calloc(1, sizeof(mcpwm_cap_timer_t), MCPWM_MEM_ALLOC_CAPS);
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ESP_GOTO_ON_FALSE(cap_timer, ESP_ERR_NO_MEM, err, TAG, "no mem for capture timer");
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ESP_GOTO_ON_ERROR(mcpwm_cap_timer_register_to_group(cap_timer, config->group_id), err, TAG, "register timer failed");
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mcpwm_group_t *group = cap_timer->group;
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int group_id = group->group_id;
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#if SOC_MCPWM_CAPTURE_CLK_FROM_GROUP
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// capture timer clock source is same as the MCPWM group
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ESP_GOTO_ON_ERROR(mcpwm_select_periph_clock(group, (soc_module_clk_t)config->clk_src), err, TAG, "set group clock failed");
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cap_timer->resolution_hz = group->resolution_hz;
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#else
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// capture timer has independent clock source selection
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switch (config->clk_src) {
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case MCPWM_CAPTURE_CLK_SRC_APB:
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cap_timer->resolution_hz = esp_clk_apb_freq();
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#if CONFIG_PM_ENABLE
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ret = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "mcpwm_cap_timer", &cap_timer->pm_lock);
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ESP_GOTO_ON_ERROR(ret, err, TAG, "create ESP_PM_APB_FREQ_MAX lock failed");
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#endif // CONFIG_PM_ENABLE
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break;
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default:
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ESP_GOTO_ON_FALSE(false, ESP_ERR_INVALID_ARG, err, TAG, "invalid clock source:%d", config->clk_src);
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}
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#endif
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// fill in other capture timer specific members
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cap_timer->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
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cap_timer->fsm = MCPWM_CAP_TIMER_FSM_INIT;
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*ret_cap_timer = cap_timer;
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ESP_LOGD(TAG, "new capture timer at %p, in group (%d), resolution %"PRIu32, cap_timer, group_id, cap_timer->resolution_hz);
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return ESP_OK;
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err:
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if (cap_timer) {
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mcpwm_cap_timer_destory(cap_timer);
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}
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return ret;
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}
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esp_err_t mcpwm_del_capture_timer(mcpwm_cap_timer_handle_t cap_timer)
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{
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ESP_RETURN_ON_FALSE(cap_timer, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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ESP_RETURN_ON_FALSE(cap_timer->fsm == MCPWM_CAP_TIMER_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "timer not in init state");
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for (int i = 0; i < SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER; i++) {
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ESP_RETURN_ON_FALSE(!cap_timer->cap_channels[i], ESP_ERR_INVALID_STATE, TAG, "cap channel still in working");
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}
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mcpwm_group_t *group = cap_timer->group;
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ESP_LOGD(TAG, "del capture timer in group %d", group->group_id);
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// recycle memory resource
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ESP_RETURN_ON_ERROR(mcpwm_cap_timer_destory(cap_timer), TAG, "destory capture timer failed");
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return ESP_OK;
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}
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esp_err_t mcpwm_capture_timer_enable(mcpwm_cap_timer_handle_t cap_timer)
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{
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ESP_RETURN_ON_FALSE(cap_timer, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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ESP_RETURN_ON_FALSE(cap_timer->fsm == MCPWM_CAP_TIMER_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "timer not in init state");
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if (cap_timer->pm_lock) {
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ESP_RETURN_ON_ERROR(esp_pm_lock_acquire(cap_timer->pm_lock), TAG, "acquire pm_lock failed");
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}
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cap_timer->fsm = MCPWM_CAP_TIMER_FSM_ENABLE;
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return ESP_OK;
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}
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esp_err_t mcpwm_capture_timer_disable(mcpwm_cap_timer_handle_t cap_timer)
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{
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ESP_RETURN_ON_FALSE(cap_timer, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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ESP_RETURN_ON_FALSE(cap_timer->fsm == MCPWM_CAP_TIMER_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "timer not in enable state");
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if (cap_timer->pm_lock) {
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ESP_RETURN_ON_ERROR(esp_pm_lock_release(cap_timer->pm_lock), TAG, "release pm_lock failed");
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}
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cap_timer->fsm = MCPWM_CAP_TIMER_FSM_INIT;
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return ESP_OK;
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}
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esp_err_t mcpwm_capture_timer_start(mcpwm_cap_timer_handle_t cap_timer)
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{
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ESP_RETURN_ON_FALSE(cap_timer, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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ESP_RETURN_ON_FALSE(cap_timer->fsm == MCPWM_CAP_TIMER_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "timer not enabled yet");
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mcpwm_group_t *group = cap_timer->group;
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portENTER_CRITICAL_SAFE(&cap_timer->spinlock);
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mcpwm_ll_capture_enable_timer(group->hal.dev, true);
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portEXIT_CRITICAL_SAFE(&cap_timer->spinlock);
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return ESP_OK;
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}
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esp_err_t mcpwm_capture_timer_stop(mcpwm_cap_timer_handle_t cap_timer)
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{
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ESP_RETURN_ON_FALSE(cap_timer, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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ESP_RETURN_ON_FALSE(cap_timer->fsm == MCPWM_CAP_TIMER_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "timer not enabled yet");
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mcpwm_group_t *group = cap_timer->group;
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portENTER_CRITICAL_SAFE(&cap_timer->spinlock);
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mcpwm_ll_capture_enable_timer(group->hal.dev, false);
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portEXIT_CRITICAL_SAFE(&cap_timer->spinlock);
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return ESP_OK;
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}
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esp_err_t mcpwm_capture_timer_get_resolution(mcpwm_cap_timer_handle_t cap_timer, uint32_t *out_resolution)
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{
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ESP_RETURN_ON_FALSE(cap_timer && out_resolution, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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*out_resolution = cap_timer->resolution_hz;
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return ESP_OK;
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}
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static esp_err_t mcpwm_capture_channel_register_to_timer(mcpwm_cap_channel_t *cap_channel, mcpwm_cap_timer_t *cap_timer)
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{
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int cap_chan_id = -1;
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portENTER_CRITICAL(&cap_timer->spinlock);
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for (int i = 0; i < SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER; i++) {
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if (!cap_timer->cap_channels[i]) {
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cap_timer->cap_channels[i] = cap_channel;
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cap_chan_id = i;
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break;
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}
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}
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portEXIT_CRITICAL(&cap_timer->spinlock);
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ESP_RETURN_ON_FALSE(cap_chan_id >= 0, ESP_ERR_NOT_FOUND, TAG, "no free channel in the timer (%d)", cap_timer->group->group_id);
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cap_channel->cap_chan_id = cap_chan_id;
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cap_channel->cap_timer = cap_timer;
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return ESP_OK;
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}
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static void mcpwm_capture_channel_unregister_from_timer(mcpwm_cap_channel_t *cap_chan)
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{
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mcpwm_cap_timer_t *cap_timer = cap_chan->cap_timer;
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int cap_chan_id = cap_chan->cap_chan_id;
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portENTER_CRITICAL(&cap_timer->spinlock);
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cap_timer->cap_channels[cap_chan_id] = NULL;
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portEXIT_CRITICAL(&cap_timer->spinlock);
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}
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static esp_err_t mcpwm_capture_channel_destory(mcpwm_cap_channel_t *cap_chan)
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{
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if (cap_chan->intr) {
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ESP_RETURN_ON_ERROR(esp_intr_free(cap_chan->intr), TAG, "delete interrupt service failed");
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}
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if (cap_chan->cap_timer) {
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mcpwm_capture_channel_unregister_from_timer(cap_chan);
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}
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free(cap_chan);
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return ESP_OK;
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}
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esp_err_t mcpwm_new_capture_channel(mcpwm_cap_timer_handle_t cap_timer, const mcpwm_capture_channel_config_t *config, mcpwm_cap_channel_handle_t *ret_cap_channel)
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{
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esp_err_t ret = ESP_OK;
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mcpwm_cap_channel_t *cap_chan = NULL;
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ESP_GOTO_ON_FALSE(cap_timer && config && ret_cap_channel, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
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ESP_GOTO_ON_FALSE(config->prescale && config->prescale <= MCPWM_LL_MAX_CAPTURE_PRESCALE, ESP_ERR_INVALID_ARG, err, TAG, "invalid prescale");
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// create instance firstly, then install onto platform
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cap_chan = calloc(1, sizeof(mcpwm_cap_channel_t));
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ESP_GOTO_ON_FALSE(cap_chan, ESP_ERR_NO_MEM, err, TAG, "no mem for capture channel");
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ESP_GOTO_ON_ERROR(mcpwm_capture_channel_register_to_timer(cap_chan, cap_timer), err, TAG, "register channel failed");
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mcpwm_group_t *group = cap_timer->group;
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mcpwm_hal_context_t *hal = &group->hal;
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int cap_chan_id = cap_chan->cap_chan_id;
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mcpwm_ll_capture_enable_negedge(hal->dev, cap_chan_id, config->flags.neg_edge);
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mcpwm_ll_capture_enable_posedge(hal->dev, cap_chan_id, config->flags.pos_edge);
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mcpwm_ll_invert_input(hal->dev, cap_chan_id, config->flags.invert_cap_signal);
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mcpwm_ll_capture_set_prescale(hal->dev, cap_chan_id, config->prescale);
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if (config->gpio_num >= 0) {
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// GPIO configuration
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gpio_config_t gpio_conf = {
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.intr_type = GPIO_INTR_DISABLE,
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.mode = GPIO_MODE_INPUT | (config->flags.io_loop_back ? GPIO_MODE_OUTPUT : 0), // also enable the output path if `io_loop_back` is enabled
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.pin_bit_mask = (1ULL << config->gpio_num),
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.pull_down_en = config->flags.pull_down,
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.pull_up_en = config->flags.pull_up,
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};
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ESP_GOTO_ON_ERROR(gpio_config(&gpio_conf), err, TAG, "config capture GPIO failed");
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esp_rom_gpio_connect_in_signal(config->gpio_num, mcpwm_periph_signals.groups[group->group_id].captures[cap_chan_id].cap_sig, 0);
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}
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cap_chan->gpio_num = config->gpio_num;
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cap_chan->fsm = MCPWM_CAP_CHAN_FSM_INIT;
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*ret_cap_channel = cap_chan;
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ESP_LOGD(TAG, "new capture channel (%d,%d) at %p", group->group_id, cap_chan_id, cap_chan);
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return ESP_OK;
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err:
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if (cap_chan) {
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mcpwm_capture_channel_destory(cap_chan);
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}
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return ret;
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}
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esp_err_t mcpwm_del_capture_channel(mcpwm_cap_channel_handle_t cap_channel)
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{
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ESP_RETURN_ON_FALSE(cap_channel, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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ESP_RETURN_ON_FALSE(cap_channel->fsm == MCPWM_CAP_CHAN_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "channel not in init state");
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mcpwm_cap_timer_t *cap_timer = cap_channel->cap_timer;
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mcpwm_group_t *group = cap_timer->group;
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mcpwm_hal_context_t *hal = &group->hal;
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int cap_chan_id = cap_channel->cap_chan_id;
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ESP_LOGD(TAG, "del capture channel (%d,%d)", group->group_id, cap_channel->cap_chan_id);
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if (cap_channel->gpio_num >= 0) {
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gpio_reset_pin(cap_channel->gpio_num);
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}
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portENTER_CRITICAL(&group->spinlock);
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mcpwm_ll_intr_enable(hal->dev, MCPWM_LL_EVENT_CAPTURE(cap_chan_id), false);
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mcpwm_ll_intr_clear_status(hal->dev, MCPWM_LL_EVENT_CAPTURE(cap_chan_id));
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portEXIT_CRITICAL(&group->spinlock);
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// recycle memory resource
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ESP_RETURN_ON_ERROR(mcpwm_capture_channel_destory(cap_channel), TAG, "destory capture channel failed");
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return ESP_OK;
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}
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esp_err_t mcpwm_capture_channel_enable(mcpwm_cap_channel_handle_t cap_channel)
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{
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ESP_RETURN_ON_FALSE(cap_channel, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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ESP_RETURN_ON_FALSE(cap_channel->fsm == MCPWM_CAP_CHAN_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "channel not in init state");
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mcpwm_hal_context_t *hal = &cap_channel->cap_timer->group->hal;
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// enable interrupt service
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if (cap_channel->intr) {
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ESP_RETURN_ON_ERROR(esp_intr_enable(cap_channel->intr), TAG, "enable interrupt service failed");
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}
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// enable channel
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mcpwm_ll_capture_enable_channel(hal->dev, cap_channel->cap_chan_id, true);
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cap_channel->fsm = MCPWM_CAP_CHAN_FSM_ENABLE;
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return ESP_OK;
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}
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esp_err_t mcpwm_capture_channel_disable(mcpwm_cap_channel_handle_t cap_channel)
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{
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ESP_RETURN_ON_FALSE(cap_channel, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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ESP_RETURN_ON_FALSE(cap_channel->fsm == MCPWM_CAP_CHAN_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "channel not in enable state");
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mcpwm_hal_context_t *hal = &cap_channel->cap_timer->group->hal;
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// disable channel
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mcpwm_ll_capture_enable_channel(hal->dev, cap_channel->cap_chan_id, false);
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// disable interrupt service
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if (cap_channel->intr) {
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ESP_RETURN_ON_ERROR(esp_intr_disable(cap_channel->intr), TAG, "disable interrupt service failed");
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}
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cap_channel->fsm = MCPWM_CAP_CHAN_FSM_INIT;
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return ESP_OK;
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}
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esp_err_t mcpwm_capture_channel_register_event_callbacks(mcpwm_cap_channel_handle_t cap_channel, const mcpwm_capture_event_callbacks_t *cbs, void *user_data)
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{
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ESP_RETURN_ON_FALSE(cap_channel && cbs, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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mcpwm_group_t *group = cap_channel->cap_timer->group;
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mcpwm_hal_context_t *hal = &group->hal;
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int group_id = group->group_id;
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int cap_chan_id = cap_channel->cap_chan_id;
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#if CONFIG_MCWPM_ISR_IRAM_SAFE
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if (cbs->on_cap) {
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ESP_RETURN_ON_FALSE(esp_ptr_in_iram(cbs->on_cap), ESP_ERR_INVALID_ARG, TAG, "on_cap callback not in IRAM");
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}
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if (user_data) {
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ESP_RETURN_ON_FALSE(esp_ptr_internal(user_data), ESP_ERR_INVALID_ARG, TAG, "user context not in internal RAM");
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}
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#endif
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// lazy install interrupt service
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if (!cap_channel->intr) {
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ESP_RETURN_ON_FALSE(cap_channel->fsm == MCPWM_CAP_CHAN_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "channel not in init state");
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int isr_flags = MCPWM_INTR_ALLOC_FLAG;
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ESP_RETURN_ON_ERROR(esp_intr_alloc_intrstatus(mcpwm_periph_signals.groups[group_id].irq_id, isr_flags,
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(uint32_t)mcpwm_ll_intr_get_status_reg(hal->dev), MCPWM_LL_EVENT_CAPTURE(cap_chan_id),
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mcpwm_capture_default_isr, cap_channel, &cap_channel->intr), TAG, "install interrupt service for cap channel failed");
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}
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portENTER_CRITICAL(&group->spinlock);
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mcpwm_ll_intr_enable(hal->dev, MCPWM_LL_EVENT_CAPTURE(cap_chan_id), cbs->on_cap != NULL);
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portEXIT_CRITICAL(&group->spinlock);
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cap_channel->on_cap = cbs->on_cap;
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cap_channel->user_data = user_data;
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return ESP_OK;
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}
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esp_err_t mcpwm_capture_channel_trigger_soft_catch(mcpwm_cap_channel_handle_t cap_channel)
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{
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ESP_RETURN_ON_FALSE(cap_channel, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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ESP_RETURN_ON_FALSE(cap_channel->fsm == MCPWM_CAP_CHAN_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "channel not enabled yet");
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mcpwm_cap_timer_t *cap_timer = cap_channel->cap_timer;
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mcpwm_group_t *group = cap_timer->group;
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|
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// note: soft capture can also triggers the interrupt routine
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mcpwm_ll_trigger_soft_capture(group->hal.dev, cap_channel->cap_chan_id);
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return ESP_OK;
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}
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esp_err_t mcpwm_capture_timer_set_phase_on_sync(mcpwm_cap_timer_handle_t cap_timer, const mcpwm_capture_timer_sync_phase_config_t *config)
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{
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ESP_RETURN_ON_FALSE(cap_timer, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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// capture timer only support count up
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ESP_RETURN_ON_FALSE(config->direction == MCPWM_TIMER_DIRECTION_UP, ESP_ERR_INVALID_ARG, TAG, "invalid sync direction");
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mcpwm_group_t *group = cap_timer->group;
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mcpwm_sync_t *sync_source = config->sync_src;
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|
|
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// a non-NULL sync_src means to enable sync feature
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|
if (sync_source) {
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switch (sync_source->type) {
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case MCPWM_SYNC_TYPE_GPIO: {
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ESP_RETURN_ON_FALSE(group == sync_source->group, ESP_ERR_INVALID_ARG, TAG, "capture timer and sync source are not in the same group");
|
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mcpwm_gpio_sync_src_t *gpio_sync_src = __containerof(sync_source, mcpwm_gpio_sync_src_t, base);
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mcpwm_ll_capture_set_gpio_sync(group->hal.dev, gpio_sync_src->sync_id);
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ESP_LOGD(TAG, "enable sync to GPIO (%d,%d) for cap timer (%d)",
|
|
group->group_id, gpio_sync_src->sync_id, group->group_id);
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break;
|
|
}
|
|
case MCPWM_SYNC_TYPE_TIMER: {
|
|
ESP_RETURN_ON_FALSE(group == sync_source->group, ESP_ERR_INVALID_ARG, TAG, "capture timer and sync source are not in the same group");
|
|
mcpwm_timer_sync_src_t *timer_sync_src = __containerof(sync_source, mcpwm_timer_sync_src_t, base);
|
|
mcpwm_ll_capture_set_timer_sync(group->hal.dev, timer_sync_src->timer->timer_id);
|
|
ESP_LOGD(TAG, "enable sync to pwm timer (%d,%d) for cap timer (%d)",
|
|
group->group_id, timer_sync_src->timer->timer_id, group->group_id);
|
|
break;
|
|
}
|
|
case MCPWM_SYNC_TYPE_SOFT: {
|
|
mcpwm_soft_sync_src_t *soft_sync = __containerof(sync_source, mcpwm_soft_sync_src_t, base);
|
|
soft_sync->soft_sync_from = MCPWM_SOFT_SYNC_FROM_CAP;
|
|
soft_sync->cap_timer = cap_timer;
|
|
soft_sync->base.group = group;
|
|
break;
|
|
}
|
|
}
|
|
mcpwm_ll_capture_enable_timer_sync(group->hal.dev, true);
|
|
mcpwm_ll_capture_set_sync_phase_value(group->hal.dev, config->count_value);
|
|
} else { // disable sync feature
|
|
mcpwm_ll_capture_enable_timer_sync(group->hal.dev, false);
|
|
ESP_LOGD(TAG, "disable sync for cap timer (%d)", group->group_id);
|
|
}
|
|
return ESP_OK;
|
|
}
|
|
|
|
IRAM_ATTR static void mcpwm_capture_default_isr(void *args)
|
|
{
|
|
mcpwm_cap_channel_t *cap_chan = (mcpwm_cap_channel_t *)args;
|
|
mcpwm_group_t *group = cap_chan->cap_timer->group;
|
|
mcpwm_hal_context_t *hal = &group->hal;
|
|
int cap_id = cap_chan->cap_chan_id;
|
|
bool need_yield = false;
|
|
|
|
uint32_t status = mcpwm_ll_intr_get_status(hal->dev);
|
|
mcpwm_ll_intr_clear_status(hal->dev, status & MCPWM_LL_EVENT_CAPTURE(cap_id));
|
|
|
|
// read capture value and pass to user
|
|
mcpwm_capture_event_data_t data = {
|
|
.cap_value = mcpwm_ll_capture_get_value(hal->dev, cap_id),
|
|
.cap_edge = mcpwm_ll_capture_get_edge(hal->dev, cap_id),
|
|
};
|
|
if (status & MCPWM_LL_EVENT_CAPTURE(cap_id)) {
|
|
mcpwm_capture_event_cb_t cb = cap_chan->on_cap;
|
|
if (cb) {
|
|
if (cb(cap_chan, &data, cap_chan->user_data)) {
|
|
need_yield = true;
|
|
}
|
|
}
|
|
}
|
|
|
|
if (need_yield) {
|
|
portYIELD_FROM_ISR();
|
|
}
|
|
}
|