1. The transmitting mode of the packets from LWIP to MAC is changed from synchronous to asynchronous.
2. The receive buf mode : support pointer mode and copy mode.
3. Add get phy status func used to config mac register.
CI: use gitlab repo for bt lib on non master barnch
same as wifi lib, some bt lib might not be pushed to github yet for developping branches
See merge request !342
Minor fixes from various sources
- Fix memory debugging code. Noticed by Tuan.
- intr_enable/disable should be in IRAM. Noticed by rojer
- Still old timer code in examples in doxygen comments. Noticed on the forum by jumjum123
- Timer example was broken. Noticed on the forum by jumjum123
See merge request !325
ULP: add new instructions, fix bugs, add tests
This adds peripheral register read and write instructions, an instruction to wake the SoC from deep sleep, and some tests.
Also fixes two bugs: ANDI instruction definition, and running the ULP when in deep sleep mode.
See merge request !317
Fix exception handler to jump to correct vector instead of crashing to the double exception vector.
One-character fix... basically, this caused the exception handler to crash into the double-exception handler instead of nicy panic'ing.
See merge request !323
Secure boot: Option for app & partition table signing to happen outside build system
Allows for a remote signing server, private signing key does not need to be on the build system.
See merge request !320
Allow gw to be null
Github Pull Request 163: https://github.com/espressif/esp-idf/pull/163
Allow interfaces to be configured without a default gateway, for
local-only communication.
In case of the AP interface, if gw is not set, do not offer it.
See merge request !312
1. add sigma-delta code and example.
2. add gpio output signal in io matrix.
Squashed commits:
[a25e7d4] minor changes for doc
[6a03a1e] minor changes on comments and doc.
[97dd9e4] Add doc.
update index.rst
change example index
Starting the ULP using SENS_SAR_START_FORCE_REG doesn’t disable clock gating of RTC fast clock.
When SoC goes into deep sleep mode, RTC fast clock gets gated, so ULP can no longer run.
Instead, it has to be started using the timer (RTC_CNTL_ULP_CP_SLP_TIMER_EN bit).
When ULP is enabled by the timer, clock also gets enabled.
extend deep sleep APIs
This adds the following APIs to enable various wakeup sources:
- esp_deep_sleep_enable_timer_wakeup
- esp_deep_sleep_enable_ulp_wakeup
- esp_deep_sleep_enable_ext0_wakeup
- esp_deep_sleep_enable_ext1_wakeup
And an API to start deep sleep:
- esp_deep_sleep_start
Add an API to control which peripherals are kept enabled in deep sleep mode:
- esp_err_t esp_deep_sleep_pd_config
Also rolled an update of rtc_io header comments into this MR, as I had to add `slpie`, `slpsel`, and `hold` fields into `rtc_gpio_desc_t` struct.
Deep sleep unit tests don’t do anything useful in CI context because we don’t have a way to check reset behavior (time till reset, reason for reset) in CI environment, yet. Also for external wakeup we would need to control some ESP32 pins from the test environment.
Currently there is one known issue:
- RTC Fast memory may be isolated from the bus after deep sleep reset. We work around this by setting FORCE_NONISO flag in RTC power control register. This is non-optimal and we will keep looking for the reason why isolation gets enabled.
See merge request !297
This change allows setting pin configuration for EXT1 wakeup depending on the state of RTC_PERIPH power domain:
- if peripherals are enabled (due to another wakeup mode, or due to esp_deep_sleep_pd_config call), we can keep internal pullups/pulldowns enabled
- if peripherals are disabled, pullups and pulldowns need to be disabled as well
Also add comments about the purpose of registers being configured.
This adds a workaround for a bug that following deep sleep wakeup, ISO (bus isolation) signal may be set for RTC fast memory.
We set FORCE_NOISO bit in RTC_CNTL_PWC_REG until we find out what is causing ISO signal to be set.
