We reserve 4KB Slow RTC memory to save RF calibation result and BT NVS data.
If not all these Slow RTC momory Blocks are used, we will open the other parts.
App can contain a stub program resident in RTC fast memory. Bootloader
will load the stub on initial boot. If the device wakes from deep sleep,
the stub is run immediately (before any other data is loaded, etc.)
To implement a custom wake stub, implement a function in your program:
```
void RTC_IRAM_ATTR esp_wake_deep_sleep(void)
{
esp_default_wake_deep_sleep();
// other wake logic
}
```
... and it will replace the default implementation.
* master: (32 commits)
components/nghttp: rename Makefile to component.mk
components/nghttp: add HTTP2.0 protocol feature
compoenents/esp32: don't alias start_cpu1 to start_cpu0_default
components/freertos: fix a bug with an uninitialised return value
Change application entry point name back to app_main
gitlab-ci: build SSC with matching branch name, if available
components/spi_flash: remove stray level of indentation
components/nvs: fix broken sentences in comment blocks
components/esp32: fix renaming of esp_event_set_cb, minor clean up
components/esp32: remove "_user" part from entry points, weaken start_cpu0/1
Fix a spelling mistake in panic message, add carriage return to stack canary message
components/lwip,esp32: fixes for C++
components/bt: fix compilation, remove ./ from makefile
components/esp32: clarify type of queue in wifi_init_config_t, add default init macro
components/esp32: add ESP_ERROR_CHECK
Event handling refactoring
clean up warnings
components/esp32,bt: fix typos in comments
Startup flow refactoring
Roll back submodule version
...
This change removes implicit WiFi/BT initialization from startup code.
"main" task is started once essential part of startup code is complete.
This task calls application-provided "int main(void)" function, which can call WiFi/BT init functions if necessary.
1. timer reg file for both time group 0 and time group 1, not only timer group 0
2. fix bug that io mux header file mismatch with chip
3. fix bug that some BASE address not correct
4. add some static function to eagle.fpga32.rom.addr.v7.ld
5. add interrupts usage table
6. add some comments for rom code functions
