Commit Graph

118 Commits

Author SHA1 Message Date
Cao Sen Miao
f0ca580c80 temperature_sensor: Apply new-shared interface in temperature sensor driver 2023-09-01 11:03:37 +08:00
wuzhenghui
2df2c1cc46 fix(lightsleep): fix access pu_cfg after sleep wake wakeup which is linked to flash 2023-08-01 16:42:59 +08:00
Jiang Jiang Jian
e0550972c0 Merge branch 'bugfix/fix_chip_broken_bug_in_monitor_mode_c3s2s3_to_v4.4' into 'release/v4.4'
ESP32S2/C3/S3: fixed S2 dangerous power parameters in sleep modes and support S2/C3/S3 different sleep mode(v4.4)

See merge request espressif/esp-idf!23758
2023-06-20 16:46:12 +08:00
morris
564e20dd6b Merge branch 'refactor/improve_adc_power_maintanance_v4.4' into 'release/v4.4'
adc: improve power logic (v4.4)

See merge request espressif/esp-idf!23275
2023-06-20 10:52:46 +08:00
hongshuqing
066a1ac0ac fix chip broken bug in monitor mode c3s2s3 to v4.4 2023-05-15 19:36:25 +08:00
Armando
2a0a4fadd9 sar: init sar periph power state 2023-04-25 14:03:29 +08:00
jiangguangming
96f3c2bac6 rtc_time.c: simplify the rtc_time_get with LL function 2023-04-24 11:37:46 +08:00
Li Shuai
6356453f8d sleep: fix sleep current issue caused by sar adc 2023-04-20 11:43:13 +08:00
Armando
1b2a254d71 adc: improve power logic 2023-04-20 10:42:12 +08:00
wuzhenghui
91b9483987 Revert "optimize deep sleep current in wifi softap mode"
This reverts commit 344ec80fad.
2023-03-13 20:41:16 +08:00
Armando
cf9cb577ce esp_psram: return error when fail to detect oct psram 2023-03-07 02:39:44 +00:00
KonstantinKondrashov
26960f1734 efuse: Adds major and minor versions and others 2022-12-20 16:30:13 +08:00
Armando
3fb3600ee0 psram: remove CS/CLK pin settings in kconfig on ESP32S2/S3 2022-11-11 17:45:03 +08:00
Song Ruo Jing
883e54aa71 rtc_clk: Fix rtc8m calibration failure after cpu/core reset
Explicitly guarantee 8md256 clk is enabled before calibration
2022-10-12 12:33:47 +08:00
Jiang Jiang Jian
3911a1b8e7 Merge branch 'feature/support_7.2.8_soc/pvt_dig_v4.4' into 'release/v4.4'
ESP32S3:support auto adjust LDO voltage based on pvt-dig(backport 4.4)

See merge request espressif/esp-idf!20249
2022-09-29 11:07:55 +08:00
zlq
b44530f188 1.add ldo parameters in efuse table; 2.set ldo based on pvt-efuse; 3.ldo voltage is changed based on cpu freq 2022-09-29 03:16:49 +08:00
jingli
13984c0a79 esp_hw_support/clk_cali: fix xtal32k error detect 2022-09-21 15:11:04 +08:00
Michael (XIAO Xufeng)
12369a5faf Merge branch 'bugfix/reserve_dma_ram_in_segments_v4.4' into 'release/v4.4'
psram: reserve dma pool in the step of heap max block (v4.4)

See merge request espressif/esp-idf!18858
2022-09-11 02:49:39 +08:00
Song Ruo Jing
b2f4fc022a rtc_clk: Fix wrong RC_FAST and RC_SLOW clock frequency values on ESP32C3 and ESP32S3 2022-08-19 12:21:11 +08:00
wanlei
92abac1fd8 psram: fixed heap pool reservation for DMA/internal usage fail issue
As heap block may be allocated into multiple non-continuous chunks, to
reserve enough memory for dma/internal usage, we do the malloc in the
step of max available block.
2022-07-28 10:12:17 +08:00
Jiang Jiang Jian
1133b0ef10 Merge branch 'bugfix/touch_wait_circle_after_wakeup_from_sleep_on_s3_v4.4' into 'release/v4.4'
touch: fix the touch sensor wait cycle on s3 (v4.4)

See merge request espressif/esp-idf!17424
2022-06-19 22:49:08 +08:00
chaijie
2a1002b4a4 modify voltage param to fit all mode of S3 2022-06-05 02:33:51 +08:00
Michael (XIAO Xufeng)
a2e1b6756e esp32s3: fixed dangerous power parameters in sleep modes 2022-06-05 02:33:51 +08:00
Michael (XIAO Xufeng)
f46bd50884 pm: putting dbias and pd_cur code into same function 2022-06-05 02:33:51 +08:00
Michael (XIAO Xufeng)
254870c3c4 rtc: fixed 8MD256 can't be used as RTC slow src on ESP32
Sync configuration from other chips

Closes: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089
2022-06-05 02:33:50 +08:00
morris
0340c2f2bc Merge branch 'bugfix/keep_rtc8m_in_lightsleep_v4.4' into 'release/v4.4'
pm: fixed RTC8M domain power down issue when used as RTC source (v4.4)

See merge request espressif/esp-idf!18075
2022-05-30 09:54:39 +08:00
Michael (XIAO Xufeng)
ae6c52e9f9 Merge branch 'bugfix/fix_memory_miss_bug_v4.4' into 'release/v4.4'
esp32c3/esp32s3: Fix cpu crash bug when wakeup from lightsleep for memory data miss (backport v4.4)

See merge request espressif/esp-idf!17826
2022-05-19 13:47:20 +08:00
Jiang Jiang Jian
0bbdd67231 Merge branch 'bugfix/fix_s3_bbpll_calibrate_fail_bug_v4.4' into 'release/v4.4'
ESP32S3: fix bbpll calibrate fail bug in high temperature  (backport v4.4)

See merge request espressif/esp-idf!17896
2022-05-19 10:39:52 +08:00
chaijie
d222adbeeb solve memory error bug when in lightsleep mode 2022-05-18 17:43:13 +08:00
Michael (XIAO Xufeng)
17b9cc6b4a pm: fixed RTC8M domain power issues
introduced in e44ead5356

1. The int8M power domain config by default is PD. While LEDC is using
RTC8M as clock source, this power domain will be kept on.

But when 8MD256 is used as RTC clock source, the power domain should
also be kept on.

On ESP32, there was protection for it, but broken by commit
e44ead5356. Currently the power domain
will be forced on when LEDC is using RTC8M as clock source &&
!int8m_pd_en (user enable ESP_PDP_DOMAIN_RTC8M in lightsleep). Otherwise
the power domain will be powered off, regardless of RTC clock source.

In other words, int8M domain will be forced off (even when 8MD256
used as RTC clock source) if LEDC not using RTC8M as clock source, user
doesn't enable ESP_PDP_DOMAIN_RTC8M, or in deep sleep.

On later chips, there's no such protection, so 8MD256 could't be used as
RTC clock source in sleep modes.

This commit adds protection of 8MD256 clock to other chips. Fixes the
incorrect protection logic overriding on ESP32. Now the power domain
will be determiend by the logic below (order by priority):

    1. When RTC clock source uses 8MD256, power up
    2. When LEDC uses RTC8M clock source, power up
    3. In deepsleep, power down
    4. Otherwise determined by user config of ESP_PDP_DOMAIN_RTC8M,
       power down by default. (This is preferred to have highest
       priority, but it's kept as is because of current code structure.)

2. Before, after the macro `RTC_SLEEP_CONFIG_DEFAULT` decides dbias, the
protection above may force the int8m PU. This may cause the inconsistent
of dbias and the int8m PU status.

This commit lifts the logic of pd int8m/xtal fpu logic to upper layer
(sleep_modes.c).

Related: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089

temp
2022-05-12 15:57:09 +08:00
jingli
a2f141807f fix rtc mem load err(since the voltage of rtc regulator is too low) 2022-05-01 23:29:12 +08:00
chaijie
a86cad6afe fix s3 bbpll calibrate fail bug in high temperature 2022-04-25 18:21:10 +08:00
Michael (XIAO Xufeng)
d378ca2b78 esp_phy: use spinlock to avoid regi2c access conflicts 2022-04-06 12:18:23 +08:00
laokaiyao
19faa6ef43 touch: fix the touch sensor wait cycle on s3 2022-03-11 06:24:07 +00:00
Armando
32afe6a498 sleep: restore analog calibration registers after waking up from light sleep
Closes https://github.com/espressif/esp-idf/issues/8287
Closes https://github.com/espressif/esp-idf/issues/7921
2022-03-07 11:28:48 +08:00
Cao Sen Miao
a74e06560b USB_SERIAL_JTAG: Fix the issue that there is no rom log when restarting 2022-02-15 18:56:06 +08:00
Martin Vychodil
7d9652dccf System/Security: Memprot API unified (ESP32C3,ESP32S3)
Unified Memory protection API for all PMS-aware chips

Closes JIRA IDF-3849
2022-01-27 12:40:27 +08:00
Jakob Hasse
ee24264c75 feat (bootloader): added rng sampling
Set maximum RNG query frequency to save value known from tests
2022-01-03 16:24:41 +05:30
Armando
4a429d59ac adc: update adc calibration efuse version
ADC calibration scheme and algorithm are not changed. Only the eFuse bit BLOCK1_VERSION is changed. This MR updated the logic to recognize the adc efuse version
2021-12-13 13:03:23 +08:00
jingli
1d6c95000b reduce bootup time when using usb-serial-jtag 2021-12-03 20:50:22 +08:00
Armando
c331c85318 mspi: make cpu clock source switch safe
For some of the MSPI high frequency setting (e.g. 80M DDR mode Flash or PSRAM), timing tuning is required.
Certain delays will be added to the MSPI RX direction. When system clock switches down, the delays should be
cleared. When system clock switches up, the delays should be restored.
2021-10-19 21:47:27 +08:00
wuzhenghui
5000aa877f fix rtc_clk_cal: Wait for timeout in a loop instead of just judge once 2021-10-19 12:07:34 +08:00
wuzhenghui
ab9df9945f fix stuck in rtc_clk_cal 2021-10-14 16:25:54 +08:00
Li Shuai
73829221f5 esp_hw_support: force power down wifi and bt power domain when rtc module init 2021-10-14 10:51:10 +08:00
Armando
16a91399f1 psram: put opiram_psram and spiram_psram in internal ram
External memory is accessed via SPI0. When modifying the SPI0 registers,
should put the code in internal RAM. Otherwise when there is an ongoing
SPI0 transaction, CPU changes the SPI0 registers. This is dangerous.
Besides, modifying SPI0 registers may lead external memory to an
unstable state. Therefore putting these code in internal RAM is
necessary.
2021-10-08 17:39:41 +08:00
Armando
7ff9332243 rtc: fix mspi timing issue when self-calibrate ocode
When doing OCode self-calibration in rtc_init.c, it will change the
system clock from PLL to XTAL, which is in a lower frequency, and MSPI
timing tuning is not needed. Therefore we should modify the timing
configurations accordingly, and set it back after the calibration.

This is a temporary fix
2021-10-08 15:59:57 +08:00
Armando
4cafdbd83b mspi: fix psram cs timing register setting not in iram bug 2021-10-08 15:59:57 +08:00
Armando
2655a506c9 mspi: support auto detect octal flash vendor 2021-10-08 15:59:57 +08:00
Jiang Jiang Jian
f5ae8b0533 Merge branch 'feature/ledc_use_rtc8m_or_xtal_lightsleep' into 'master'
support RTC8M and XTAL power domain in light sleep mode

Closes IDF-3419

See merge request espressif/esp-idf!15152
2021-09-27 04:02:29 +00:00
Jiang Jiang Jian
a015123a1d Merge branch 'feature/rename_apbctrl_to_syscon' into 'master'
rename apbctrl to syscon

See merge request espressif/esp-idf!14524
2021-09-16 12:58:07 +00:00