Commit Graph

7 Commits

Author SHA1 Message Date
Armando
c1cbd7bbf6 cache/mmu: implememnt cache and mmu hal APIs in bootloader 2022-03-11 22:43:11 +08:00
Eva Dengler
9fd621c7ad Fix typos.
alignement -> alignment
2022-02-25 19:32:15 +01:00
Martin Vychodil
16891e7a6c System: fix RTCFAST section alignment
This bugfix contains 3 fixes:
1. .rtc_dummy section is removed (not needed for C3)
2. .rtc_text section is padded with 16B for possible CPU prefetch
3. .rtc_text section is aligned to 4B boundary to comply with PMS Memprot requirements
2021-12-23 19:58:39 +08:00
Martin Vychodil
dd938eb952 System/Security: Memprot API unified (ESP32C3)
Unified Memory protection API for all PMS-aware chips (ESP32C3)

Closes JIRA IDF-3849
2021-12-21 01:50:36 +01:00
Mahavir Jain
e0d29d4ada esp_system: create ld template to abstract few common settings
PMS aware chips require prefetch padding size for instruction fetch, or
some memory alignment considerations. These settings are now exposed
through kconfig options (hidden) and used through common ld template.
This shall help to add and manage future chips support easily for
these considerations.

Closes IDF-3624
2021-09-02 16:13:17 +08:00
Martin Vychodil
ce28af2dd4 System/memprot: ESP32C3 IRAM section alignment fix (LD)
IRAM section didn't contain sufficient padding for possible CPU instruction prefetch,
ie instruction fetch could happen in DRAM section which is prohibited by the Memprot module.
This is fixed by adding 16B to the end of IRAM section in LD script (C3 CPU prefetch buffer depth is 4 words)

Closes IDF-3554

* fix
2021-07-23 17:11:12 +02:00
Renz Bagaporo
b06dba7823 esp32: move app linker scripts 2021-07-16 20:14:27 +08:00