SMP FreeRTOS uses a single kernel lock for all critical sections. There is a known
issue with esp_ipc_isr_stall_other_cpu() that can cause dead if the other CPU is
already in a critical section.
This commit adds a temporary workaround to reduce the chance of deadlock by taking
the SMP FreeRTOS kernel lock first before stalling the other CPU.
See IDF-5257 for more details.
prvYieldCore() leads to an array-out-of-bounds error when compiled with
-Os optimization and configNUM_CORES = 1. This commit avoids this
compile warning by compiling out the part of code which is unnecessary
when configNUM_CORES is 1.
1. sleep: fix potential issue when PSRAM enable.
2. esp32c2: add multiphy support.
3. ftm: workaround for ftm with ps.
4. add regdomain max channel of ap.
5. update total scan time.
6. update min chan when country policy is auto.
7. check whether country schan and nchan is valid.
This fixes the issue where multiline strings and strings with delimiters inside the nvs input csv file were incorrectly parsed, and adds back the ability to add comment lines anywhere in the CSV file.
The issue stems from the move away from the python built in csv module to manual parsing, which was made after moving away from using the csv module to parse mfg data.
This reverts back to using the csv module for parsing and writing csv data in both mfg_gen and nvs_partition_gen, fixes the original issue in mfg_gen and improves code quality which makes the code more readable and maintainable.
Closes https://github.com/espressif/esp-idf/issues/7175
The previously used splits between memory allocated for ROM code,
2nd stage bootloader and the app were somewhat safe and conservative.
This resulted in some space being unavailable for static allocation
in the app.
This commit increases the space available for static allocation to the
maximum possible amount.
1. Some of the ROM code static allocation is only used in UART/USB/SPI
download modes. This region ("shared buffers") has been placed at
the lower end of ROM memory area, to be reusable in flash boot
mode. The 2nd stage bootloader linker script is modified to "pack"
all sections exactly up to the end but with roughly 8K margin between
startup stacks.
2. Instead of calculating the sections placement and hardcoding the
addresses in the LD script again, rewrite it to calculate the
start address of each memory region automatically based on the
logic above.
3. Adjust the app memory layout (SRAM_IRAM_END) accordingly,
increasing the space available for static allocation.
Overall these changes increase the space available for static
allocation by about 78kB.
The downside of these changes is that the 2nd stage bootloader .data
segment is now directly adjacent to the startup stack on the PRO CPU.
Previously, there was effectively about 78kB of extra stack space for
the PRO CPU, before the stack would run into the data segment.
The Xtensa FreeRTOS port does not save the threadptr register when
doing a voluntary yield. This can result in a crash when multiple
tasks used the threadptr register and call "taskYIELD()".
This commit adds the threadptr register to the solicited stack frame.
