Commit Graph

25 Commits

Author SHA1 Message Date
Eva Dengler
9fd621c7ad Fix typos.
alignement -> alignment
2022-02-25 19:32:15 +01:00
Martin Vychodil
0e52b9d230 System: Memory section .rtc.dummy removed
ESP32H2 doesn't support access to RTC memory through various buses, thus .rtc.dummy section
makes no sense here. The section is used for blind padding in LD script - to provide proper section offsets)
2022-02-22 13:52:46 +01:00
Sudeep Mohanty
2fc9bd61bf ulp: refactor ulp component
This commit refactors the ulp component.
Files are now divided based on type of ulp, viz., fsm or risc-v.
Files common to both are maintained in the ulp_common folder.

This commit also adds menuconfig options for ULP within the ulp
component instead of presenting target specific configuations for ulp.
2022-01-27 11:54:42 +05:30
laokaiyao
cf049e15ed esp8684: rename target to esp32c2 2022-01-19 11:08:57 +08:00
Omar Chebib
b0afae5e60 espcoredump: fix a bug where tracked DRAM data where not dumped
Variables marked as COREDUMP_DRAM_ATTR will now be part of the core dump.

* Closes https://github.com/espressif/esp-idf/issues/8151
2022-01-06 16:53:35 +08:00
Martin Vychodil
16891e7a6c System: fix RTCFAST section alignment
This bugfix contains 3 fixes:
1. .rtc_dummy section is removed (not needed for C3)
2. .rtc_text section is padded with 16B for possible CPU prefetch
3. .rtc_text section is aligned to 4B boundary to comply with PMS Memprot requirements
2021-12-23 19:58:39 +08:00
Martin Vychodil
dd938eb952 System/Security: Memprot API unified (ESP32C3)
Unified Memory protection API for all PMS-aware chips (ESP32C3)

Closes JIRA IDF-3849
2021-12-21 01:50:36 +01:00
Li Shuai
37e1e9c540 Merge branch 'bugfix/memory_region_define_rtc_fast' into 'master'
substract rtc_iram_seg memory region size from ESP_BOOTLOADER_RESERVE_RTC

Closes WIFI-4115

See merge request espressif/esp-idf!15743
2021-11-15 02:34:35 +00:00
Cao Sen Miao
09487761cf ESP8684: add freertos, hal, esp_system support 2021-11-06 17:33:44 +08:00
Li Shuai
9ac58e32a2 substract rtc_iram_seg memory region size from ESP_BOOTLOADER_RESERVE_RTC 2021-10-29 21:24:09 +08:00
Li Shuai
881e1b0fd5 deep sleep: add deep sleep support for esp32s3 2021-10-20 11:36:20 +08:00
Li Shuai
9298db641e deep sleep: fix some rtc fast memory definition errors in esp32s3 2021-10-19 21:47:27 +08:00
baohongde
b310c062cd components/bt: move config BT_RESERVE_DRAM from bluedroid to ESP32 controller 2021-09-16 20:26:35 +08:00
Mahavir Jain
e0d29d4ada esp_system: create ld template to abstract few common settings
PMS aware chips require prefetch padding size for instruction fetch, or
some memory alignment considerations. These settings are now exposed
through kconfig options (hidden) and used through common ld template.
This shall help to add and manage future chips support easily for
these considerations.

Closes IDF-3624
2021-09-02 16:13:17 +08:00
Wu Zheng Hui
3128a2544b Adjust the variable name &
Add mapping support for different sizes of spi ram
2021-08-25 16:06:28 +08:00
simon.chupin
294f9783fc Tools: Fix memory calculations of idf_size.py 2021-08-11 17:51:51 +02:00
Michael (XIAO Xufeng)
064f12cb90 idf_size.py: fixed diram counted twice issue, and improve display
Currently static RAM usage are listed under corresponding physical
memory.

ld: fix linker script for C3 and S3
2021-08-11 17:51:50 +02:00
Marius Vikhammer
85b107bf54 Merge branch 'bugfix/rename_ext_mem_bss_section' into 'master'
ld: rename .ext_ram.noinit to .ext_ram_noinit

See merge request espressif/esp-idf!14717
2021-08-11 05:51:00 +00:00
Marius Vikhammer
6a2f7b6f88 ld: rename .ext_ram.noinit to .ext_ram_noinit
Older versions of the coredump utility tool do not correctly
handle this nameing scheme. Rename to keep forward compatibility.
2021-08-10 11:13:54 +08:00
Jan Brudný
562ce4d009 esp32s2, esp32s3: update copyright notice 2021-08-05 15:01:26 +02:00
Armando
ad8e1a395c memory: port SPIRAM noinit segment support to master 2021-07-29 10:28:39 +08:00
Devan Lai
b85011c15f esp32: Add support for noinit variables in SPIRAM
Add Kconfig option SPIRAM_ALLOW_NOINIT_EXTERNAL_MEMORY
When enabled, a new linker script rule (from esp32.extram.noinit.ld)
places any variables in the .ext_ram.noinit section in SPIRAM.

This section is exempted from the startup SPIRAM memory test and is
not zero-initialized or added to the malloc pool, making it usable
for noinit variables that persist across reset.

The EXT_RAM_NOINIT_ATTR macro places variables in this section.
2021-07-29 10:28:38 +08:00
Martin Vychodil
ce28af2dd4 System/memprot: ESP32C3 IRAM section alignment fix (LD)
IRAM section didn't contain sufficient padding for possible CPU instruction prefetch,
ie instruction fetch could happen in DRAM section which is prohibited by the Memprot module.
This is fixed by adding 16B to the end of IRAM section in LD script (C3 CPU prefetch buffer depth is 4 words)

Closes IDF-3554

* fix
2021-07-23 17:11:12 +02:00
Angus Gratton
f0471b18b2 esp32h2: Move from target component to esp_hw_support (new structure) 2021-07-16 20:14:27 +08:00
Renz Bagaporo
b06dba7823 esp32: move app linker scripts 2021-07-16 20:14:27 +08:00