6 Commits

Author	SHA1	Message	Date
morris	1c0be26531	fix(soc): soc header files can pass CI check	2023-06-26 23:00:45 +08:00
Cao Sen Miao	4713a9a7f2	ESP32H2: Introduce new chip target esp32h2, hello_world example supported	2022-12-29 12:29:14 +08:00
Song Ruo Jing	182e937c5a	clk_tree: Add basic clock support for esp32c6 ... - Support SOC ROOT clock source switch - Support CPU frequency change - Support RTC SLOW clock source switch - Support RTC SLOW clock + RC FAST calibration Remove FPGA build for esp32c6	2022-12-13 19:18:34 +08:00
wuzhenghui	23e37393a7	esp32c6: add esp_hw_support	2022-09-26 20:32:13 +08:00
Cao Sen Miao	895a3e1bb2	esp_intr: Split RTC interrupt, making some of signals can be triggered with cache disabled	2022-06-02 10:38:55 +08:00
morris	9ab4abfb46	hw_support: move rtc_ctrl from driver to hw_support	2022-04-29 14:28:09 +08:00