components/os: Move ETS_T1_WDT_INUM, ETS_CACHEERR_INUM and ETS_DPORT_INUM to l5 interrupt
components/os: high level interrupt(5)
components/os: hli_api: meta queue: fix out of bounds access, check for overflow
components/os: hli: don't spill registers, instead save them to a separate region
Level 4 interrupt has a chance of preempting a window overflow or underflow exception.
Therefore it is not possible to use standard context save functions,
as the SP on entry to Level 4 interrupt may be invalid (e.g. in WindowUnderflow4).
Instead, mask window overflows and save the entire general purpose register file,
plus some of the special registers.
Then clear WindowStart, allowing the C handler to execute without spilling the old windows.
On exit from the interrupt handler, do everything in reverse.
components/bt: using high level interrupt in lc
components/os: Add DRAM_ATTR to avoid feature `Allow .bss segment placed in external memory`
components/bt: optimize code structure
components/os: Modify the BT assert process to adapt to coredump and HLI
components/os: Disable exception mode after saving special registers
To store some registers first, avoid stuck due to live lock after disabling exception mode
components/os: using dport instead of AHB in BT to fix live lock
components/bt: Fix hli queue send error
components/bt: Fix CI fail
# Conflicts:
# components/bt/CMakeLists.txt
# components/bt/component.mk
# components/bt/controller/bt.c
# components/bt/controller/lib
# components/esp_common/src/int_wdt.c
# components/esp_system/port/soc/esp32/dport_panic_highint_hdl.S
# components/soc/esp32/include/soc/soc.h
The ethernet\iperf example has a bug, once bandwidth is more than 80 Mbits/s the average counter shows wrong total transmitted data value. Issue occur due to overflow of the uint32_t total_len variable.
* created new average formula to avoid the overflow
* updated interval formula according to new variables
* renamed variable according to its purpose
* Disable Tx interrupts to fix race condition of missing Rx interrupt
* Check if GPIO interrupt is asserted periodically if the ISR event missed
Closes https://github.com/espressif/esp-idf/issues/6414
For https connection `ESP_TLS_ERR_SSL_WANT_READ` of esp_transport_read was getting treated as error.
Treated this as a timeout to fix connection abort issue!
Also handled http connection EAGAIN with `errno == EAGAIN` check.
Signed-off-by: Vikram Dattu <vikram.dattu@espressif.com>
When using the Force U32 macros in C++, the peripheral structs will not
have copy constructors due to them being volatile. Thus, doing temp_reg = reg
via typeof() will not work and cause a "ambiguous overload of operator=" error.
This commit fixes the macros by reading the reg into a uint32_t value first.
xSemaphoreAltTake and xSemaphoreAltGive are Espressif defined macros and
are not being used. The respective definitions, xQueueAltGenericReceive
and xQueueAltGenericSend are also not part of current FreeRTOS source
(v10.4.3). Hence, removed xSemaphoreAltTake and xSemaphoreAltGive
definitions to align with upstream code.
Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
