alex/esp-idf
alex/esp-idf
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21,432 Commits 20 Branches 148 Tags 384 MiB
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177 Commits

Author SHA1 Message Date
Jiang Jiang Jian
b9e018aa53 Merge branch 'bugfix/ledc_auto_clk_refactor_v4.4' into 'release/v4.4' 
LEDC: improved support for ESP32-C3 and refactored divisor calculation (v4.4)

See merge request espressif/esp-idf!17101
 2022-07-01 10:52:00 +08:00
KonstantinKondrashov
dcc706280d reset_reasons: EFUSE_RST is treated as POWERON_RST 
ESP32 does not have the EFUSE_RST, the rest chips has this reset reason.
 2022-06-22 16:39:02 +08:00
morris
1ba0bf31b6 rmt: fix error in rmt register file 
Closes https://github.com/espressif/esp-idf/issues/9100
 2022-06-14 22:10:00 +08:00
Michael (XIAO Xufeng)
f86be6141b Merge branch 'bugfix/i2c_timeout_issue_v4.4' into 'release/v4.4' 
I2C: patch for solving watchdog timeout issue(backport v4.4)

See merge request espressif/esp-idf!18130
 2022-06-08 14:12:37 +08:00
Michael (XIAO Xufeng)
c61db5e9c9 soc_caps: add SOC_PM_SUPPORT_RTC_PERIPH_PD 
Partially pick 6336f8191e
 2022-06-06 00:17:39 +08:00
Michael (XIAO Xufeng)
f46bd50884 pm: putting dbias and pd_cur code into same function 2022-06-05 02:33:51 +08:00
Cao Sen Miao
04f7c342f0 I2C: patch for solving watchdog timeout issue 2022-05-17 16:36:40 +08:00
Michael (XIAO Xufeng)
17b9cc6b4a pm: fixed RTC8M domain power issues 
introduced in e44ead5356

1. The int8M power domain config by default is PD. While LEDC is using
RTC8M as clock source, this power domain will be kept on.

But when 8MD256 is used as RTC clock source, the power domain should
also be kept on.

On ESP32, there was protection for it, but broken by commit
e44ead5356. Currently the power domain
will be forced on when LEDC is using RTC8M as clock source &&
!int8m_pd_en (user enable ESP_PDP_DOMAIN_RTC8M in lightsleep). Otherwise
the power domain will be powered off, regardless of RTC clock source.

In other words, int8M domain will be forced off (even when 8MD256
used as RTC clock source) if LEDC not using RTC8M as clock source, user
doesn't enable ESP_PDP_DOMAIN_RTC8M, or in deep sleep.

On later chips, there's no such protection, so 8MD256 could't be used as
RTC clock source in sleep modes.

This commit adds protection of 8MD256 clock to other chips. Fixes the
incorrect protection logic overriding on ESP32. Now the power domain
will be determiend by the logic below (order by priority):

    1. When RTC clock source uses 8MD256, power up
    2. When LEDC uses RTC8M clock source, power up
    3. In deepsleep, power down
    4. Otherwise determined by user config of ESP_PDP_DOMAIN_RTC8M,
       power down by default. (This is preferred to have highest
       priority, but it's kept as is because of current code structure.)

2. Before, after the macro `RTC_SLEEP_CONFIG_DEFAULT` decides dbias, the
protection above may force the int8m PU. This may cause the inconsistent
of dbias and the int8m PU status.

This commit lifts the logic of pd int8m/xtal fpu logic to upper layer
(sleep_modes.c).

Related: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089

temp
 2022-05-12 15:57:09 +08:00
songruojing
bdd7610e66 uart: fixed incorrect channel number on ESP32S2, S3 and C3 2022-03-02 02:42:06 +08:00
Michael (XIAO Xufeng)
8b86834a72 Merge branch 'bugfix/gpio_pin_num_fix_v4.4' into 'release/v4.4' 
gpio: Fix some gpio pin num errors on esp32s2 and esp32c3 (backport v4.4)

See merge request espressif/esp-idf!16594
 2022-02-10 10:21:52 +00:00
Omar Chebib
63afc84de5 LEDC: improved support for ESP32-C3 and refactored divisor calculation 
As ESP32C3 does not have support for REF_TICK source clock, it is now not
possible to select it anymore.
Auto cfg clock has been improved for all boards.
 2022-02-10 16:54:00 +08:00
morris
956c6b889f rmt: do not support rx wrap on esp32s2 
Closes https://github.com/espressif/esp-idf/issues/8354
 2022-02-09 17:29:09 +08:00
Roland Dobai
a59e3ab59d Merge branch 'feature/esp32s3_apptrace_v4.4' into 'release/v4.4' 
Feature/esp32s3 apptrace v4.4

See merge request espressif/esp-idf!16649
 2022-01-26 09:58:35 +00:00
laokaiyao
816b0ce878 i2s: impove the apll and clock division calculation 2022-01-13 11:06:40 +08:00
Alexey Gerenkov
8c2990fcea trax: Adds ESP32-S3 support 2022-01-05 19:34:28 +01:00
songruojing
b25fb1111d gpio: Fix some gpio pin num errors on esp32s2 and esp32c3 2021-12-30 12:27:14 +08:00
Armando
1ec46ad3b8 adc: support adc dma driver on all chips 2021-12-23 17:13:46 +08:00
alex.li
26d8b7ee17 Add HW external coexist api. 
Simplify the external coex flow.

And replace gpio of driver interface with hal one.
 2021-10-12 14:05:14 +08:00
Kevin (Lao Kaiyao)
a9faafee3c Merge branch 'feature/touch_sensor_driver_support_for_esp32s3' into 'master' 
driver(touch): support touch sensor for esp32s3 platform

Closes IDF-1784 and IDF-3302

See merge request espressif/esp-idf!14102
 2021-10-12 05:50:58 +00:00
laokaiyao
a1cadba191 touch_sensor: apply general check 2021-10-08 11:32:12 +08:00
fuzhibo
589646a31e update touch with review advice 2021-10-08 10:39:46 +08:00
fuzhibo
057b9d61b5 driver(touch): support touch sensor for esp32s3 platform 2021-10-08 10:39:46 +08:00
morris
e09e39c94f lcd: unify callback prototype 2021-10-02 14:23:31 +08:00
Jiang Jiang Jian
f5ae8b0533 Merge branch 'feature/ledc_use_rtc8m_or_xtal_lightsleep' into 'master' 
support RTC8M and XTAL power domain in light sleep mode

Closes IDF-3419

See merge request espressif/esp-idf!15152
 2021-09-27 04:02:29 +00:00
SalimTerryLi
bd89dcc683
RMT: add loop_autostop driver support for esp32s3 2021-09-24 15:24:45 +08:00
Wu Zheng Hui
27241e8213 Merge branch 'bugfix/fix_efuse_err_address' into 'master' 
fix efuse err address in block0

See merge request espressif/esp-idf!14790
 2021-09-17 02:17:09 +00:00
Wu Zheng Hui
1080e4f6a2 rename APB_CTRL ro SYS_CON 
save
 2021-09-16 20:57:57 +08:00
wuzhenghui
8e1b8194f5 fix s2 efuse err address in block0 2021-09-16 20:08:59 +08:00
Li Shuai
b3e27403f3 esp_hw_support: keep external 40 MHz xtal related analog circuit power on during sleep 2021-09-16 14:46:21 +08:00
Li Shuai
58292a7d22 Power Management: add XTAL power domain to control whether external 40MHz xtal is powered down during sleep 2021-09-16 14:43:43 +08:00
Li Shuai
f5b39a7cde esp_hw_support: No voltage drop during light sleep to ensure stable output clock of rtc8m oscillator 2021-09-16 14:40:46 +08:00
Armando (Dou Yiwen)
13b63cd9d2 Merge branch 'feature/support_adc_calibration_s3' into 'master' 
adc: support adc calibration on s3

Closes IDF-1950, IDF-3730, and IDF-3036

See merge request espressif/esp-idf!15031
 2021-09-14 08:51:03 +00:00
morris
502e132e5d Merge branch 'feature/fast_gpio_c3' into 'master' 
fast gpio support on esp32-c3

Closes IDF-3783

See merge request espressif/esp-idf!14986
 2021-09-14 06:09:34 +00:00
Armando
c45c6f52f1 adc: support adc efuse-based calibration on esp32s3 2021-09-14 11:42:50 +08:00
Li Shuai
e44ead5356 Power Management: add RTC8M power domain to control whether internal 8m oscillator is powered down during sleep 2021-09-13 17:36:54 +08:00
songruojing
1fcd639224 usb: Add usb_phy driver to support operations on USB PHY 2021-09-13 12:39:56 +08:00
morris
6cec256a34 fast_gpio: driver support on esp32c3 2021-09-06 19:39:09 +08:00
laokaiyao
b26da6f115 driver/i2s: refactor for i2s driver layer 2021-09-02 14:33:36 +08:00
Marius Vikhammer
bdf3a8ff29 Merge branch 'feature/xtwdt' into 'master' 
WDT: Add support for XTAL32K Watchdog timer

Closes IDF-2575

See merge request espressif/esp-idf!15000
 2021-09-02 02:44:47 +00:00
Marius Vikhammer
4869b3cd4a WDT: Add support for XTAL32K Watchdog timer 2021-09-02 09:09:00 +08:00
SalimTerryLi
892f5e7df3
timer_group: fix wrongly generated reg header that introduced in 443845fd54 2021-08-30 13:51:25 +08:00
SalimTerryLi
874a720286
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one 
update all struct headers to be more "standardized":

- bit fields are properly wrapped with struct
- bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits
- bit field should be uint32_t
- typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199

added helper macros to force peripheral registers being accessed in 32 bitwidth

added a check script into ci
 2021-08-30 13:50:58 +08:00
Martin Vychodil
58aed7df98 ESP32S2: No assert()/abort() in Memprot API, use esp_err_t instead 
JIRA IDF-3634
 2021-08-26 09:20:00 +02:00
Wu Zheng Hui
3128a2544b Adjust the variable name & 
Add mapping support for different sizes of spi ram
 2021-08-25 16:06:28 +08:00
morris
0c41837b06 Merge branch 'refactor/timer_group-reg_file-update' into 'master' 
refactor/timer_group update reg headers for c3 and s2

Closes IDF-3690

See merge request espressif/esp-idf!14761
 2021-08-23 04:30:59 +00:00
morris
bb87fd8f08 Merge branch 'refactor/pcnt_driver_esp32s3' into 'master' 
pcnt: soc update and hal refactor

See merge request espressif/esp-idf!14698
 2021-08-20 04:23:15 +00:00
SalimTerryLi
443845fd54
timer_group: update reg headers for c3&s2&h2 and fix direct 8/16bit reg access 2021-08-19 18:56:32 +08:00
bizhuangyang
8143832041 spi_master:support octal mode for esp32s2 and esp32s3 
Add support for 8-line spi for lcd on esp32s2 and esp32s3

Closes https://github.com/espressif/esp-idf/issues/6371
 2021-08-19 16:40:22 +08:00
morris
6fdc5877cd lcd: support i80 LCD on esp32/s2/s3 2021-08-10 21:06:59 +08:00
morris
1656cee69d i2s: correct soc info 
1. remove non-exist I2S instance
2. update soc_caps.h, i2s_ll.h
 2021-08-10 21:06:59 +08:00