Commit Graph

18 Commits

Author SHA1 Message Date
Gustavo Henrique Nihei
3cbac3dd1d esp_system: Ensure TIMG0 clock is always enabled during normal operation
If the TimerGroup 0 clock is disabled and then reenabled, the watchdog
registers (Flashboot protection included) will be re-enabled, and some
seconds later, will trigger an unintended reset.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2023-03-06 04:58:11 +00:00
Song Ruo Jing
8486a2c3ad Merge branch 'bugfix/revert_rtc_clock_bbpll_power_on_with_usb' into 'master'
usb_serial_jtag: Improve the code for the issue of usb cdc device unable to work during sleep

Closes IDFGH-6887

See merge request espressif/esp-idf!20973
2023-02-27 23:18:54 +08:00
Song Ruo Jing
1a66459b44 usb_serial_jtag: Improve the code for the issue of usb cdc device unable to work during sleep
1. Remove RTC_CLOCK_BBPLL_POWER_ON_WITH_USB Kconfig option
   During sleep, BBPLL clock always gets disabled
   esp_restart does not disable BBPLL clock, so that first stage bootloader log can be printed
2. Add a new Kconfig option PM_NO_AUTO_LS_ON_USJ_CONNECTED
   When this option is selected, IDF will constantly monitor USB CDC port connection status.
   As long as it gets connected to a HOST, automatic light-sleep will not happen.

Closes https://github.com/espressif/esp-idf/issues/8507
2023-02-27 12:10:49 +08:00
Armando
4997689de5 cache: support h2 and c6 cache error 2023-02-24 16:16:46 +08:00
jingli
9c37441b17 wdt: refactor wdt codes to use unified type 2023-02-15 12:08:55 +08:00
Wu Zheng Hui
d1b6ff6cca Merge branch 'bugfix/reset_modem_lpcon_in_soft_reset' into 'master'
bugfix: reset modem lpcon in soft reset

See merge request espressif/esp-idf!22347
2023-02-14 10:31:17 +08:00
wuzhenghui
0afeac9951 bugfix: reset modem lpcon in soft reset 2023-02-13 17:04:35 +08:00
Li Shuai
59cf87fe7d pmu: sleep initialization and sleep start support for esp32c6
Initialize the pmu sleep machine constant when pmu is initialized, and calculate
the pmu sleep time adjustment value and hardware configuration value according
to the machine constant during system sleep.

Calibrate fast OSC before each sleep and use the calibration value to calculate
PMU hardware wait cycles when use the fast OSC as the work clock.
2023-01-31 22:12:27 +08:00
wuzhenghui
a5fdc53bb7 clk: initialize wifi lp_clk in esp_perip_clk_init 2022-12-29 13:13:37 +08:00
Li Shuai
3ce896429c periph clock: implemented the modem module enable, disable and reset for esp32c6 2022-12-27 21:31:59 +08:00
Li Shuai
e9172ddcea initialize the clock gating control signal of each modem clock domain 2022-12-27 21:31:59 +08:00
wuzhenghui
5822cdf93b esp_phy: enable for esp32c6 2022-12-16 15:47:56 +08:00
Song Ruo Jing
182e937c5a clk_tree: Add basic clock support for esp32c6
- Support SOC ROOT clock source switch
    - Support CPU frequency change
    - Support RTC SLOW clock source switch
    - Support RTC SLOW clock + RC FAST calibration

    Remove FPGA build for esp32c6
2022-12-13 19:18:34 +08:00
Cao Sen Miao
d9f01ed43c spi_flash: bringup for esp32c6 2022-11-09 12:50:46 +08:00
wuzhenghui
6b96534c68 bugfix: esprv_intc_int_set_type() should not use bitmap parameter 2022-10-14 11:31:22 +08:00
Song Ruo Jing
1eb9a24a48 esp_system: Minor update for esp32c6 2022-09-26 20:32:13 +08:00
wuzhenghui
ab09c07fdd esp32c6: add esp_system support 2022-09-06 09:13:20 +00:00
songruojing
304a8f142d esp32c6: introduce the target
Add esp32c6 target to tools and Kconfig
Create directories and files that are essential for `idf.py --preview set-target esp32c6`
2022-08-19 11:13:02 +08:00