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36,010 Commits 20 Branches 148 Tags 384 MiB
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80 Commits

Author SHA1 Message Date
Marius Vikhammer
8a5b5610b9 ulp-riscv: enable ULP-RISCV ADC example for esp32s2 
ADC can now be used from the ULP-RISCV on S2 after the RTC power parameters were
fixed in a624d8d061

Closes https://github.com/espressif/esp-idf/issues/11052
Closes https://github.com/espressif/esp-idf/issues/11040
 2023-04-11 13:08:36 +08:00
Ivan Grokhotkov
bb3f1fd261
examples: re-enable console examples for C2, C6, H2 
- Split the sleep-related system commands into a separate file
- Don't compile that file and don't register sleep commands for H2 yet
- Exclude Wi-Fi commands if the chip doesn't have Wi-Fi
 2023-03-25 17:41:56 +01:00
KonstantinKondrashov
11815b324f examples: Enables eFuse example tests for C6/H2/S3 
Closes IDF-7011
 2023-03-07 17:04:42 +08:00
jingli
49b40f1999 esp32c2/ci: reenable deep sleep example test 2023-03-06 10:58:18 +08:00
wuzhenghui
38c4910996 ci: enable esp32c6 deepsleep ci tests 2023-03-02 15:06:05 +08:00
Erhan Kurubas
db10697b74 example/system: remove app_trace_to_host example. Instead use app_trace_basic 2023-02-15 10:30:32 +01:00
Cao Sen Miao
fd3e0b0b18 esp32h2(ci): enable target test 2023-02-15 10:20:43 +08:00
jingli
13b5e625a7 UT/esp32c2: reenable pm and sleep related UT 2023-02-02 20:26:08 +08:00
wuzhenghui
7a4d38eac1 example: bringup light sleep example for esp32c6 2023-01-31 22:12:58 +08:00
Cao Sen Miao
94120b82c2 esp32h2: add build test 2023-01-17 10:29:04 +08:00
jiangguangming
51ec91c637 add example deep sleep wake stub 2023-01-10 17:03:50 +08:00
Song Ruo Jing
56302544f6 Merge branch 'ci/enable_esp32c6_target_test_stage' into 'master' 
CI: Enable esp32c6 target test stage

Closes IDF-5830 and IDF-5831

See merge request espressif/esp-idf!21010
 2022-11-29 19:54:05 +08:00
KonstantinKondrashov
f6f173e3d3 esp_timer: Fix tests for C2 chip 2022-11-28 20:02:06 +08:00
Song Ruo Jing
1575b9e43a ci: Disable all currently failed target tests for esp32c6 2022-11-28 12:09:08 +08:00
Song Ruo Jing
7466ddfa8c ci: Make consistence between pytest_*.py and .build-test-rules.yml for esp32c6 (i.e. to pass check_test_scripts_build_test_rules.py) 2022-11-28 11:58:30 +08:00
Song Ruo Jing
2557e24a28 ci: Enable esp32c6 example, test_apps, and unit tests CI build stage 2022-11-01 11:23:21 +08:00
Gao Xu
1005c3b9d5 Merge branch 'feature/add_flash_copy_to_psram_example' into 'master' 
system: add an example showing moving Flash content to PSRAM feature

Closes IDF-5156

See merge request espressif/esp-idf!19340
 2022-09-21 12:15:19 +08:00
gaoxu
47c02efa72 system: add an example and pytest to showing moving Flash content to PSRAM feature. 2022-09-19 12:25:30 +08:00
Marius Vikhammer
77ba84eeb7 ulp-fsm: Update ulp-fsm ADC example with S3 support 
Closes https://github.com/espressif/esp-idf/issues/7963
 2022-09-07 16:48:06 +08:00
Sudeep Mohanty
867745a05c Merge branch 'feature/ulp-rtc-i2c-driver-support' into 'master' 
ulp: Added support for RTC I2C driver for ULP RISC-V on esp32s2 and esp32s3

Closes IDF-1715 and IDF-5798

See merge request espressif/esp-idf!19549
 2022-09-06 16:43:36 +08:00
Sudeep Mohanty
4fde033a5f ulp: Added support for RTC I2C driver for ULP RISC-V on esp32s2 and esp32s3 
This commit adds support for using the RTC I2C peripheral on the ULP
RISC-V core for esp32s2 and esp32s3. It also adds an example to demonstrate the
usage of the RTC I2C peripheral.

This commit also modifies the rtc_i2c register structure files to enable
the use of bitfields in the ULP RISC-V RTC I2C driver.
 2022-09-05 10:21:43 +02:00
Marius Vikhammer
c36cd5238c bootloader: allow skip image validation on C2 
BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP is not supported on C2 due to
no RTC memory, but BOOTLOADER_SKIP_VALIDATE_ALWAYS should still be
supported.
 2022-08-25 16:51:44 +08:00
Erhan Kurubas
587ecc6fe8 examples/sysview: add missing supported targets to readme 2022-08-11 11:06:10 +02:00
KonstantinKondrashov
346cba9c57 efuse example: Adds CI tests for ESP32-C2 2022-08-04 13:14:24 +00:00
Marius Vikhammer
1fa411d515 Merge branch 'feature/system_test_pytest' into 'master' 
CI: migrate esp_event and select example to pytest

See merge request espressif/esp-idf!19295
 2022-08-02 10:50:46 +08:00
Marius Vikhammer
5d23a757d6 Merge branch 'feature/ulp_uart' into 'master' 
ulp-riscv: uart print

See merge request espressif/esp-idf!19229
 2022-08-02 09:14:48 +08:00
Marius Vikhammer
7c78de7be8 CI: migrate esp_event and select example to pytest 2022-08-01 12:20:06 +08:00
Marius Vikhammer
32efa1e92d Add ULP-RISCV print and bitbanged UART tx API 
Add example to demonstrate the use of this API.
 2022-07-29 12:18:01 +08:00
Erhan Kurubas
b0881a1e6c examples/gcov: add missing supported targets to readme 2022-07-28 13:59:29 +02:00
Fu Hanxi
05d2357062 feat: use standalone project idf-build-apps for find/build apps utils 2022-07-14 08:26:31 +08:00