Sudeep Mohanty
c3888541f1
fix(ulp-risc-v): Fixed RTC I2C multi-byte read/write issue for ULP RISC-V
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This commit fixes an issue where multi-byte reads and writes over the
RTC I2C peripheral got stuck on the esp32s2 and esp32s3.
Closes https://github.com/espressif/esp-idf/issues/12235
2024-06-24 09:17:59 +02:00
Sudeep Mohanty
e5d9d1dd60
Merge branch 'contrib/github_pr_14010' into 'master'
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fix(ulp): Write pin's output mode to the correct register (GitHub PR)
Closes IDFGH-13065
See merge request espressif/esp-idf!31581
2024-06-19 14:57:40 +08:00
Marius Vikhammer
aae3aa5e5f
feat(lp-core): bringup lp-core for C5 MP
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LP-Core is now able to boot and run on C5 MP chip.
2024-06-19 09:18:47 +08:00
LonerDan
37fad48e1f
fix(ulp-risc-v): Set RTC GPIO output mode in the correct register for ULP RISC-V
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According to the ESP32-S2/S3 TRM, the output pin's mode is set in the RTC_GPIO_PINn_REG
by programming the RTC_GPIO_PINn_PAD_DRIVER bit. The current ULP RISC-V RTCIO driver
however, incorrectly programs the RTC_IO_TOUCH_PADn_REG register field RTC_IO_TOUCH_PADn_DRV.
This commit fixes the bug.
2024-06-18 14:33:13 +02:00
andylinpersonal
700f9b7e90
feat(ulp): Generate compile_commands.json for ulp targets
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This commit adds the generation of the compile_command.json file for ULP
and LP core apps.
Merges https://github.com/espressif/esp-idf/pull/13926
2024-06-12 10:17:16 +02:00
wuzhenghui
cca222948a
fix(esp_driver_gpio): manage lp_io module clock by driver
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Closes https://github.com/espressif/esp-idf/issues/13683
2024-06-05 17:56:37 +08:00
Marius Vikhammer
13e5b6f335
Merge branch 'feature/lp_core_pcnt' into 'master'
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feat(ulp): add pulse counter example for lp core
Closes IDF-9137
See merge request espressif/esp-idf!31163
2024-06-03 12:33:50 +08:00
Marius Vikhammer
7495f3bf28
feat(ulp): add pulse counter example for lp core
2024-05-30 14:30:00 +08:00
Marius Vikhammer
de77d04358
feat(ulp): add lp core panic handler
2024-05-28 14:42:59 +08:00
Sudeep Mohanty
3fd3c37507
Merge branch 'fix/fix_flaky_lp_uart_tests' into 'master'
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Fixed unstable LP UART tests and added new tests
Closes IDFCI-2137
See merge request espressif/esp-idf!30524
2024-05-27 14:39:14 +08:00
Marius Vikhammer
7a89223aed
fix(lp_core_test): fixed race-condition in lp core tests
2024-05-15 10:50:23 +08:00
Marius Vikhammer
76b7d12329
Merge branch 'feature/lp_core_interrupts' into 'master'
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feat(ulp): support interrupts for C6/P4 LP core
Closes IDFGH-11986 and IDF-7200
See merge request espressif/esp-idf!30399
2024-04-29 14:36:54 +08:00
Marius Vikhammer
c5a513cf49
feat(ulp): support interrupts for C6/P4 LP core
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Closes https://github.com/espressif/esp-idf/issues/13059
2024-04-28 17:03:23 +08:00
Sudeep Mohanty
3cbe88427e
test(lp-core): Added unit test for lp_core_printf
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This commit adds a unit test for the lp_core_printf API.
2024-04-26 16:56:48 +02:00
Sudeep Mohanty
be8a0568c5
test(lp-core): Fixed unstable LP UART tests
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This commit fixes some flaky LP UART unit tests.
2024-04-26 14:32:16 +02:00
Sudeep Mohanty
df7e51fb8d
feat(lp-uart): Added unit tests for LP UART when used from LP Core
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This commit adds unit tests for the LP UART peripheral.
2024-04-22 18:34:48 +02:00
laokaiyao
fc000cd7b7
ci(doc): enable doc build for esp32c5
2024-04-18 19:39:29 +08:00
Marius Vikhammer
1fa59c442b
fix(ulp): fixed lp-core not booting during sleep
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LP core was unable to boot when system was in deepsleep.
This was due to lp uart init in LP rom using XTAL as clk source,
which is normally powered down during sleep.
This would cause lp uart to get stuck while printing ROM output,
and the app would never boot.
Also fixed wrong wakeup cause used by HP core for ULP wake up
2024-04-18 11:36:30 +08:00
Marius Vikhammer
4533f16c34
fix(rtc_memory): fix conflict between LP-ROM and RTC reserved
2024-04-17 13:37:56 +08:00
Marek Fiala
f2b75d81b3
fix(system): fix idf.py build ulp examples containing spaces in path on Win
2024-04-09 14:00:34 +02:00
Alexey Lapshin
4879bac36c
feat(ulp): use --mcpu=esp32s3 for esp32s3
2024-04-04 16:12:39 +08:00
Marius Vikhammer
cbc632bd04
fix(lp_core): fix kconfig not allowing using all of LP mem for P4 lp core
2024-03-28 16:39:16 +08:00
Sudeep Mohanty
5228dc348b
feat(lp_i2c): Added LP I2C support on the esp32p4
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This commit adds support for the LP I2C peripheral to be used from the
LP core on the esp32p4.
2024-03-26 08:31:54 +01:00
Dr. Michael Lauer
08dead4b31
feat(ulp-riscv): Add convenience print function that supports different widths
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This commit adds a convenience function to print hex numbers of
different widths on the ULP RISC-V core.
Closes https://github.com/espressif/esp-idf/pull/13180
2024-03-19 09:41:05 +01:00
Marius Vikhammer
4700f709ca
Merge branch 'feature/c5_ulp' into 'master'
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feat(ulp): add basic support for running lp core on C5
Closes IDF-8637
See merge request espressif/esp-idf!29496
2024-03-19 11:33:51 +08:00
Wu Zheng Hui
ba4b493df8
Merge branch 'fix/lp_core_uart_clk_init' into 'master'
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fix(lp_uart): Fixed LP UART bus clock initialization flow
See merge request espressif/esp-idf!29680
2024-03-18 10:21:42 +08:00
Sudeep Mohanty
6d73dda897
fix(lp_uart): Fixed LP UART bus clock initialization flow
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This MR updates the LP UART bus clock initialization flow to avoid
a lock up when accessing the LP UART peripheral.
2024-03-15 09:28:35 +01:00
Sudeep Mohanty
b90a279587
feat(lp-core): Added ability to print from LP ROM on the LP core
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This commit adds the ability to use LP ROM functions from the LP core.
This allows the LP core code to utilize standard functions such as those
for printing from the LP ROM and therefore help reduce the code size on
the LP core.
2024-03-14 18:45:02 +01:00
Sudeep Mohanty
26fd843376
feat(lp_core): Added support for LP UART on LP core for esp32p4
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This commit enables LP UART support for the LP core on the esp32p4.
2024-03-14 18:45:02 +01:00
Marius Vikhammer
a32fb07e7b
feat(ulp): add basic support for running lp core on C5
2024-03-13 17:37:29 +08:00
Sudeep Mohanty
1c015a3f0d
feat(ulp-riscv): Added unit test for RTC I2C
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This commit adds a unit-test for RTC I2C operation on the ULP RISC-V.
2024-02-21 11:46:19 +01:00
Sudeep Mohanty
993c8d4f0e
fix(ulp-riscv): Wrapped all RTC I2C and UART operations in critical sections
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This commit adds a workaround for a bug where the RTC I2C operations
result in a Bus Error when interrupts are enabled. The commit also adds
a critical section protection for UART print operations.
2024-02-21 11:45:06 +01:00
Sudeep Mohanty
d352ec615a
feat(ulp-riscv): Added utility functions for atomicity
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This commit adds utility functions to enter and exit critical sections
in the code flow by disabling and enabling interrupts.
2024-02-21 11:45:06 +01:00
Sudeep Mohanty
bc74cf808d
feat(ulp-riscv): Added Kconfig option to enable ULP RISC-V interrupts
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This commit adds a Kconfig option, CONFIG_ULP_RISCV_INTERRUPT_ENABLE, to
enable interrupts on the ULP RISC-V core on the esp32s2 and esp32s3.
2024-02-21 11:45:06 +01:00
Omar Chebib
5a32ca10ad
feat(lp_core): add a public function to get the timer cycle count
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Closes https://github.com/espressif/esp-idf/issues/13101
2024-02-09 16:50:02 +08:00
Sudeep Mohanty
7acc152f1c
Merge branch 'bugfix/rtc_i2c_not_in_od_mode' into 'master'
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fix(ulp_riscv): Updated RTC I2C to use open-drain IOs
See merge request espressif/esp-idf!28799
2024-02-06 15:40:24 +08:00
Marius Vikhammer
dff1e5df88
feat(lp_core): add support for lp timer and lp gpio on P4
2024-02-06 09:41:20 +08:00
Sudeep Mohanty
e93c3068a0
fix(ulp_riscv): Updated RTC I2C to use open-drain IOs
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This commit updates the RTC I2C driver in the ULP RISC-V to initialize
all I2C IOs in open-drain mode.
2024-01-30 14:54:45 +01:00
Sudeep Mohanty
df00205db3
Merge branch 'bugfix_lp_i2c_not_in_od_mode' into 'master'
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fix(lp_i2c): Fixed an issue where the LP_I2C IO lines were not in open-drain mode
Closes IDFGH-11883
See merge request espressif/esp-idf!28739
2024-01-29 16:47:07 +08:00
Song Ruo Jing
10b41d7a24
Merge branch 'refactor/soc_rtc_h_file' into 'master'
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refactor(rtc): move soc/rtc.h from soc to esp_hw_support component
Closes IDF-8941
See merge request espressif/esp-idf!28238
2024-01-26 20:20:20 +08:00
Sudeep Mohanty
36ac4631ae
fix(lp_i2c): Fixed an issue where the LP_I2C IO lines were not in open-drain mode
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This commit fixes an issue where in the LP I2C IO lines were not
initialized in open-drain mode.
Closes https://github.com/espressif/esp-idf/issues/12969
2024-01-26 11:25:25 +01:00
Song Ruo Jing
cf93777077
refactor(rtc): move soc/rtc.h from soc to esp_hw_support component
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Deprecated rtc_xtal_freq_t, replaced with soc_xtal_freq_t defined in
clk_tree_defs.h in soc component.
2024-01-25 19:15:33 +08:00
Marius Vikhammer
1bcfde4e7f
fix(ulp): enable astyle linter and format ULP component
2024-01-22 11:43:38 +08:00
Sudeep Mohanty
94e2516f6c
feat(ulp-riscv): Added support for RTC IO interrupts for ULP RISC-V
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This commit adds a feature to register RTC IO interrupt handlers for the
ULP RISC-V co-processor.
2024-01-18 15:59:45 +01:00
Sudeep Mohanty
b9ecc1e57a
feat(ulp-riscv): Added SW interrupt capability for ULP RISC-V
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This commit adds a feature to ULP RISC-V where the user can trigger
a software interrupt on the ULP RISC-V core.
2024-01-18 15:59:40 +01:00
Sudeep Mohanty
70241d13a2
feat(ulp-riscv): Added interrupt allocator and de-allocator
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This commit adds methods to allocate and de-allocate interrupt handlers
for the ULP RISC-V.
2024-01-18 15:59:35 +01:00
Sudeep Mohanty
a6461eab77
feat(ulp-riscv): Added interrupt vector handling for ULP RISC-V
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This commit adds interrupt vector processing for the ULP RISC-V co-processor.
2024-01-18 15:59:27 +01:00
Marius Vikhammer
13dd2c9aae
Merge branch 'contrib/github_pr_12785' into 'master'
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Provide ulp_adc_deinit() API to fix ADC1 handle leakage (GitHub PR)
Closes IDFGH-11673
See merge request espressif/esp-idf!27916
2024-01-12 12:03:52 +08:00
Fu Hanxi
d76334d83a
Merge branch 'test/fix_lp_core_config_mismatch_issue' into 'master'
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test: fix lp_core config file name mismatch issue
See merge request espressif/esp-idf!28217
2024-01-04 20:22:13 +08:00
Marius Vikhammer
c05b6533ce
change(ulp): added test for ulp adc init/deinit
2024-01-04 10:55:25 +08:00