Commit Graph

139 Commits

Author SHA1 Message Date
hongshuqing
7771d72d7c fix: fix_maximum_value_of_config_rtc_clk_cal_cycle_bug 2024-03-14 16:11:20 +08:00
wuzhenghui
7b3c08e37a
fix(esp_hw_support/sleep): fix rtc_time_us_to_slowclk div zero in deepsleep process
Closes https://github.com/espressif/esp-idf/issues/12695
2023-12-08 13:59:52 +08:00
Jakob Hasse
e3653aaa98 fix(esp_hw_support): Removed unused include directories from cmake
* Closes https://github.com/espressif/esp-idf/issues/12700
2023-12-04 12:59:51 +08:00
Armando
f01a40afe2 fix(adc): rename ADC_ATTEN_DB_11 to ADC_ATTEN_DB_12
By design, it's 12 dB. There're errors among chips, so the actual
attenuation will be 11dB more or less
2023-11-07 14:11:10 +08:00
laokaiyao
72a0746e62 refactor(apll): move the apll soc caps to clk_tree_ll 2023-09-28 15:03:27 +08:00
Michael (XIAO Xufeng)
efb9d9e7d4 Merge branch 'esp32_s2_s3_cpu_freq_to_pll' into 'master'
EspS2/S3: fixed the bug of insufficient voltage when the CPU switches frequency

See merge request espressif/esp-idf!25396
2023-09-18 20:01:31 +08:00
hongshuqing
77a303276a esp32/esp32s2/esp32s3 cpu freq to pll
add assert for cpu_freq_to_8m

update esp32 DBIAS_XTAL_80M_160M define

delete modify of esp32

remove esp32 comment

restore esp32 modify
2023-09-11 10:40:27 +08:00
morris
035c7c145c feat(clk_cali): always enable timer group0 for clock calibration
Calibration registers are located in the timer group0,
this commit is going to always enable it when the calibration is used by app
2023-08-22 17:05:35 +08:00
morris
1c0be26531 fix(soc): soc header files can pass CI check 2023-06-26 23:00:45 +08:00
Song Ruo Jing
a4e8960ab4 esp_clk_tree: Rename clk_tree_xxx to esp_clk_tree_xxx, add compilation warning to clk_tree.h 2023-04-25 14:12:06 +08:00
morris
4123e611dc esp_rom: add common ROM API to update CPU tick rate 2023-04-19 13:21:26 +08:00
cje
6c35ee3fc5 fix chip broken bug when run in monitor mode of S2 and modify voltage param to fit all sleep mode of S2/C2/C3 2023-04-10 18:04:24 +08:00
Li Shuai
a25ce78392 sleep: fix sleep current issue caused by sar adc 2023-03-17 13:06:39 +08:00
jingli
cb0f517fe3 soc/soc_caps: update soc caps for chips that support power-down of modem hardware
Closes WIFI-4424
2023-03-10 14:15:27 +08:00
Sachin Parekh
7bd5d93905 esp_hw_support: Move cpu protection in port files 2023-03-09 11:37:29 +05:30
Song Ruo Jing
1a66459b44 usb_serial_jtag: Improve the code for the issue of usb cdc device unable to work during sleep
1. Remove RTC_CLOCK_BBPLL_POWER_ON_WITH_USB Kconfig option
   During sleep, BBPLL clock always gets disabled
   esp_restart does not disable BBPLL clock, so that first stage bootloader log can be printed
2. Add a new Kconfig option PM_NO_AUTO_LS_ON_USJ_CONNECTED
   When this option is selected, IDF will constantly monitor USB CDC port connection status.
   As long as it gets connected to a HOST, automatic light-sleep will not happen.

Closes https://github.com/espressif/esp-idf/issues/8507
2023-02-27 12:10:49 +08:00
Armando (Dou Yiwen)
4452a3cf3e Merge branch 'feature/support_h2_adc' into 'master'
adc: support adc h2

Closes IDF-6124, IDF-6214, IDF-6543, IDF-6215, IDF-6664, and IDF-6695

See merge request espressif/esp-idf!22205
2023-02-24 14:28:33 +08:00
Armando
c2d5c19b28 adc: ll enum renaming 2023-02-23 11:48:31 +08:00
jingli
4c3d1e24d7 codeclean: remove unused sleep related functions 2023-02-23 11:36:13 +08:00
Song Ruo Jing
2c9aa4559c clk_tree: Add a general API to get the frequency of different clocks
Add basic clk_tree driver and hal implementation.
2023-01-17 11:30:24 +08:00
Armando (Dou Yiwen)
d1b8da74d8 Merge branch 'refactor/improve_adc_power_maintanance' into 'master'
adc: improve adc power maintanance

Closes IDF-6114 and IDF-6318

See merge request espressif/esp-idf!21151
2023-01-12 20:30:36 +08:00
jiangguangming
4b4491e736 rtc_time.c: simplify the rtc_time_get with LL function 2023-01-10 17:03:54 +08:00
Armando
5be3c21cfc adc: improve power logic 2023-01-09 17:10:04 +08:00
Armando
f9da48d94f rtc: add pwdet and sar adc power related low level func 2023-01-09 17:09:01 +08:00
morris
672ac58ad5 io_mux: can set different clock source 2022-12-29 14:46:16 +08:00
KonstantinKondrashov
741e89cbaa esp_hw_support: Removes efuse dependency 2022-11-25 19:27:33 +08:00
Aditya Patwardhan
f79d8f9c07 esp_hw_support: Merge esp_ds.c file for different targets into one 2022-11-24 16:03:30 +05:30
Aditya Patwardhan
6a75fe5912 esp_hw_support: Update build system support for mergin esp_ds.c files
into one
2022-11-24 16:03:23 +05:30
KonstantinKondrashov
244cf14ea8 esp_hw_support: Adds APIs to define user own MAC addresses without generation from the base MAC address
Closes https://github.com/espressif/esp-idf/pull/7261
Closes https://github.com/espressif/esp-idf/issues/9531
2022-11-16 19:23:10 +08:00
KonstantinKondrashov
1f9260d790 all: Apply new version logic (major * 100 + minor) 2022-11-03 08:36:23 +00:00
Armando
260ee86c37 rtc: united sar peripheral control 2022-10-27 16:51:25 +08:00
Aditya Patwardhan
c8a788ca24 esp_hw_support: Merge HMAC source files into one 2022-10-27 10:59:54 +05:30
jingli
05a2fbe810 esp_hw_support/clk_cali: fix xtal32k error detect 2022-09-21 03:03:25 +00:00
Armando
5e6a16380a esp_adc: move adc common hw related code into esp_hw_support 2022-07-28 03:49:48 +00:00
morris
5e50ec1d66 systimer: add helper functions to convert between tick and us 2022-07-25 16:08:52 +08:00
Guillaume Souchere
0bac33ed41 esp_system: Remove deprecate section from esp_cpu.h
- Remove esp_cpu_in_ocd_mode() from esp_cpu.h. Users should call esp_cpu_dbgr_is_attached() instead.
- Remove esp_cpu_get_ccount() from esp_cpu.h. Users should call esp_cpu_get_cycle_count() instead.
- Remove esp_cpu_set_ccount() from esp_cpu.h. Users should call esp_cpu_set_cycle_count() instead.
- Other IDF components updated to call esp_cpu_dbgr_is_attached(), esp_cpu_get_cycle_count() and esp_cpu_set_cycle_count() as well.
2022-07-22 00:06:06 +08:00
Guillaume Souchere
6005cc9163 hal: Deprecate interrupt_controller_hal.h, cpu_hal.h and cpu_ll.h interfaces
This commit marks all functions in interrupt_controller_hal.h, cpu_ll.h and cpu_hal.h as deprecated.
Users should use functions from esp_cpu.h instead.
2022-07-22 00:06:06 +08:00
Mahavir Jain
20e21fb29d Merge branch 'refactor/remove_rom_deps' into 'master'
RFC: remove dependency to target-specific ROM headers

Closes IDF-1968

See merge request espressif/esp-idf!18206
2022-07-13 16:44:44 +08:00
Jakob Hasse
33a3616635 refactor (bootloader_support, efuse)!: remove target-specific rom includes
The following two functions in bootloader_support are private now:
* esp_secure_boot_verify_sbv2_signature_block()
* esp_secure_boot_verify_rsa_signature_block()
They have been moved into private header files
inside bootloader_private/

* Removed bootloader_reset_reason.h and
  bootloader_common_get_reset_reason() completely.
  Alternative in ROM component is available.

* made esp_efuse.h independent of target-specific rom header
2022-07-13 10:29:02 +08:00
Martin Vychodil
0c87ae2a91 System/Security: Memprot API unified (ESP32S3)
Added missing features and improvements
2022-07-09 22:57:51 +02:00
KonstantinKondrashov
0f8ff5aa15 efuse: Adds major and minor versions and others 2022-07-05 14:38:27 +08:00
Omar Chebib
cd48baf979 Refactor: move regi2c_*.h header files from esp_hw_support to soc component
When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
2022-06-30 09:40:44 +00:00
morris
7fd9a91034 dma: move from driver to hw_support 2022-06-28 14:17:12 +08:00
Omar Chebib
8fae0f0753 G0: Support Xtensa targets for G0-only compilation
G0-only example now supports Xtensa targets. This means that G0 layer
does not depend on G1+ layers anymore
2022-06-20 11:34:20 +00:00
Armando (Dou Yiwen)
0b80546f8e Merge branch 'feature/new_esp_psram_component' into 'master'
esp_psram: new esp psram component

Closes IDF-4318, IDF-4382, IDF-4841, and IDFGH-7192

See merge request espressif/esp-idf!18050
2022-06-15 19:16:56 +08:00
Armando
cdad8a02fe esp_psram: remove g_spiram_ok 2022-06-14 15:44:27 +08:00
Armando
38e5043ae8 esp_psram: new psram component 2022-06-14 15:44:27 +08:00
songruojing
03477a59db rtc_clk: Fix rtc8m calibration failure after cpu/core reset
1. make sure 8md256 clk is enabled before calibration
2. improve bootloader and application startup 8m, 8md256 enable logic
2022-06-13 17:47:51 +08:00
songruojing
c8752cee6a clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem 2022-06-13 17:47:50 +08:00
Armando
44f771c713 psram: support s3 copy flash to psram 2022-06-10 10:39:29 +08:00