5 Commits

Author	SHA1	Message	Date
Cao Sen Miao	f28f75a46b	spi_flash: Add several flash chips HPM(120M) support	2022-09-30 11:15:34 +08:00
Cao Sen Miao	6c9c1f72bd	spi_flash: Building a framework to enable HPM when flash works under high speed mode	2022-09-29 16:37:29 +08:00
jingli	236bd27134	further fix spi flash/ram current leakage ... Currently, we pull up cs io for spi flash/ram to reduce current leakage during light sleep. But some kind of spi flash/ram chip need all io pull up. Otherwise, current leakage will still exist.	2022-07-28 13:11:55 +08:00
Armando	c331c85318	mspi: make cpu clock source switch safe ... For some of the MSPI high frequency setting (e.g. 80M DDR mode Flash or PSRAM), timing tuning is required. Certain delays will be added to the MSPI RX direction. When system clock switches down, the delays should be cleared. When system clock switches up, the delays should be restored.	2021-10-19 21:47:27 +08:00
Armando	2655a506c9	mspi: support auto detect octal flash vendor	2021-10-08 15:59:57 +08:00