Commit Graph

323 Commits

Author SHA1 Message Date
Michael (XIAO Xufeng)
3b2e8648eb bootloader: create public bootloader_flash.h header
Move non-public functions into bootloader_flash_priv.h header
2020-09-19 10:52:02 +08:00
Michael (XIAO Xufeng)
fefdee1349 bootloader: fix the WRSR format for ISSI flash chips
1. The 2nd bootloader always call `rom_spiflash_unlock()`, but never help to clear the WEL bit when exit. This may cause system unstability.

   This commit helps to clear WEL when flash configuration is done.

   **RISK:** When the app starts, it didn't have to clear the WEL before it actually write/erase. But now the very first write/erase operation should be done after a WEL clear. Though the risk is little (all the following write/erase also need to clear the WEL), we still have to test this carefully, especially for those functions used by the OTA.

2. The `rom_spiflash_unlock()` function in the patch of ESP32 may (1) trigger the QPI, (2) clear the QE or (3) fail to unlock the ISSI chips.

   Status register bitmap of ISSI chip and GD chip:

| SR | ISSI | GD25LQ32C |
| -- | ---- | --------- |
| 0  | WIP  | WIP       |
| 1  | WEL  | WEL       |
| 2  | BP0  | BP0       |
| 3  | BP1  | BP1       |
| 4  | BP2  | BP2       |
| 5  | BP3  | BP3       |
| 6  | QE   | BP4       |
| 7  | SRWD | SRP0      |
| 8  |      | SRP1      |
| 9  |      | QE        |
| 10 |      | SUS2      |
| 11 |      | LB1       |
| 12 |      | LB2       |
| 13 |      | LB3       |
| 14 |      | CMP       |
| 15 |      | SUS1      |

   QE bit of other chips are at the bit 9 of the status register (i.e. bit 1 of SR2), which should be read by RDSR2 command.

   However, the RDSR2 (35H, Read Status 2) command for chip of other vendors happens to be the QIOEN (Enter QPI mode) command of ISSI chips. When the `rom_spiflash_unlock()` function trys to read SR2, it may trigger the QPI of ISSI chips.

   Moreover, when `rom_spiflash_unlock()` try to clear the BP4 bit in the status register, QE (bit 6) of ISSI chip may be cleared by accident. Or if the ISSI chip doesn't accept WRSR command with argument of two bytes (since it only have status register of one byte), it may fail to clear the other protect bits (BP0~BP3) as expected.

   This commit makes the `rom_spiflash_unlock()` check whether the vendor is issi. if so, `rom_spiflash_unlock()` only send RDSR to read the status register, send WRSR with only 1 byte argument, and also avoid clearing the QE bit (bit 6).

3. `rom_spiflash_unlock()` always send WRSR command to clear protection bits even when there is no protection bit active. And the execution of clearing status registers, which takes about 700us, will also happen even when there's no bits cleared.

   This commit skips the clearing of status register if there is no protection bits active.

Also move the execute_flash_command to be a bootloader API; move
implementation of spi_flash_wrap_set to the bootloader
2020-09-19 10:51:51 +08:00
KonstantinKondrashov
2373f115fc efuse/esp32: Expands PKG_VER from 3 bit to 4 bits
Closes: IDF-1919
2020-09-17 07:44:37 +00:00
KonstantinKondrashov
09af4a9fad bootloader: Fix esp_get_flash_encryption_mode(). RELEASE = (CRYPT_CNT == max) or (CRYPT_CNT.write_protect == true)
If the CRYPT_CNT efuse is max it means the same as a write protection bit for this efuse.

Closes: https://github.com/espressif/esp-idf/issues/5747
2020-09-11 04:20:23 +00:00
Ivan Grokhotkov
b6467257b9 Merge branch 'feature/cmock_component' into 'master'
cmock as component replacing unity

See merge request espressif/esp-idf!9859
2020-09-10 16:06:20 +08:00
Ivan Grokhotkov
26016534d8 bootloader: move rtc_retain_mem functions back into .iram_loader.text
Introduced 66a32c17 when bootloader_common was moved out of the loader
section.

Also add a test for this configuration.
2020-09-09 10:35:29 +02:00
Ivan Grokhotkov
66a32c1707 bootloader: fix section placement issues found by the check script
Summary of changes:

- bootloader_clock split into *_clock_init and *_clock_loader.
  Only esp_clk_apb_freq is in *_clock_loader.
- bootloader_common moved out of loader; functions needed in loader
  (or, referenced from bootloader_utility) were moved into
  bootloader_common_loader.c.
- assert and abort moved into bootloader_panic, made part of the
  loader
- rtc_clk and rtc_time made part of loader
2020-09-03 18:14:17 +02:00
Michael (XIAO Xufeng)
9e7eda9770 Merge branch 'feat/spi_flash_override_size' into 'master'
spi_flash: add config option to override flash size in bootloader header

See merge request espressif/esp-idf!10131
2020-09-03 02:57:31 +08:00
Jakob Hasse
20c068ef3b cmock: added cmock as component
* changing dependencies from unity->cmock
* added component.mk and Makefile.projbuild
* ignore test dir in gen_esp_err_to_name.py
* added some brief introduction of CMock in IDF
2020-09-02 16:38:37 +08:00
Michael (XIAO Xufeng)
37423083bb spi_flash: add config option to override flash size in bootloader header
Sometimes the flash size read from bootloader is not correct. This may
forbid SPI Flash driver from reading the the area larger than the size
in bootloader header.

When the new config option is enabled, the latest configured
ESPTOOLPY_FLAHSIZE in the app header will be used to override the value
read from bootloader header.
2020-09-02 00:35:53 +08:00
Michael (XIAO Xufeng)
5425ef4ee4 hal: extract hal component from soc component 2020-09-01 13:25:32 +08:00
Sachin Billore
f1dae0d6e1 ESP32 SecureBoot V2: eFuse write operations are updated to use the eFuse Manager APIs
Closes IDF-2034

Closes https://github.com/espressif/esp-idf/issues/5771
2020-08-27 04:24:04 +00:00
Angus Gratton
a2dc60b254 Merge branch 'feature/secure_boot_esp32s2' into 'master'
Feature/secure boot esp32s2

See merge request espressif/esp-idf!8254
2020-07-28 16:39:34 +08:00
morris
2917651478 esp_rom: extract common ets apis into esp_rom_sys.h 2020-07-27 15:27:01 +08:00
Angus Gratton
a91bd4078f secure boot: Fixes for ESP32-S2 first boot logic 2020-07-27 00:01:10 +00:00
Angus Gratton
bfc3f85826 bootloader esp32s2: Fix return type of ROM function signature verification 2020-07-27 00:01:10 +00:00
Supreet Deshpande
e640e148cf Secure boot v2 support for ESP32-S2 2020-07-27 00:01:10 +00:00
Angus Gratton
c871c349f2 Merge branch 'bugfix/bootloader_common_get_sha256_of_partition' into 'master'
bootloader_support: Fix bootloader_common_get_sha256_of_partition(), can handle a long image

Closes IDFGH-3594

See merge request espressif/esp-idf!9509
2020-07-23 13:27:48 +08:00
morris
ab0537c079 esp_rom: extract common MD5 hash apis into esp_rom_md5.h 2020-07-21 17:01:28 +08:00
Angus Gratton
442736c5d6 Merge branch 'refactor/common_rom_uart_apis' into 'master'
esp_rom: extract common uart apis into esp_rom_uart.h

See merge request espressif/esp-idf!9313
2020-07-21 15:24:21 +08:00
Angus Gratton
3755fb6597 Merge branch 'feature/add_esp32s3_bootloader_ld_file' into 'master'
move part of esp32-s3 codes to master (bootloader linker, esp32s3 empty componnet)

See merge request espressif/esp-idf!9608
2020-07-21 14:51:04 +08:00
KonstantinKondrashov
d95c89a1eb bootloader_support: Fix bootloader_common_get_sha256_of_partition, can handle a long image
Closes: IDFGH-3594
2020-07-20 10:55:41 +00:00
Angus Gratton
c09fdc0b09 esp32: Use package identifier to look up SPI flash/PSRAM WP Pin, unless overridden
Allows booting in QIO/QOUT mode or with PSRAM on ESP32-PICO-V3 and
ESP32-PICO-V3-O2 without any config changes.

Custom WP pins (needed for fully custom circuit boards) should still be compatible.
2020-07-20 14:08:49 +08:00
chenjianqiang
e9dd4f283a feat(esp32): support for esp32-pico-v3-02 2020-07-20 12:21:32 +08:00
morris
6316e6eba2 esp_system: add CONFIG_ESP_SYSTEM_RTC_EXT_CRYS 2020-07-20 11:15:24 +08:00
morris
b587428e5d bootloader: make bootloader offset address in flash configurable 2020-07-20 10:51:05 +08:00
morris
345606e7f3 esp_rom: extract common uart apis into esp_rom_uart.h 2020-07-17 16:00:59 +08:00
morris
458b14a8ea esp_rom: extract common efuse apis into esp_rom_efuse.h 2020-07-15 10:40:50 +08:00
morris
a4d0033c03 esp_rom: extract common GPIO apis into esp_rom_gpio.h 2020-07-07 11:40:19 +08:00
Ivan Grokhotkov
6dfb2d83a7 bootloader: combine console code for ESP32 and S2, add USB support 2020-06-26 15:38:49 +02:00
Ivan Grokhotkov
5ee75165f2 esp_common: add "USB CDC" option for console output 2020-06-26 15:38:49 +02:00
Ivan Grokhotkov
0620890028 bootloader, rtc: don't disable PLL if it is already enabled 2020-06-24 15:50:51 +02:00
morris
a34409cffc esp_rom: extract common CRC apis into esp_rom_crc.h 2020-06-23 16:40:14 +08:00
Angus Gratton
a5683f2263 Merge branch 'bugfix/efuse_logs' into 'master'
esp32/esp32s2: Reduce using ESP_EARLY_LOGx and move some code after the stdout initialization in startup code

Closes IDFGH-3367

See merge request espressif/esp-idf!8904
2020-06-16 13:47:02 +08:00
morris
067b1b91c2 global: add new target name: esp32-s3
add target name, chip ID, toochain descriptions for ESP32-S3
2020-06-11 21:40:08 +08:00
Angus Gratton
067ce3ef32 Merge branch 'bugfix/bootloader_skip_verify_jtag' into 'master'
bootloader_support: don't check signature when JTAG is attached

Closes IDFGH-2816 and IDFGH-2660

See merge request espressif/esp-idf!7865
2020-06-10 16:09:32 +08:00
KonstantinKondrashov
5cfdf1aa70 efuse: Add some fields in efuse_table and update esp_efuse_get_pkg_ver()
Closes: IDF-1077
2020-06-08 22:35:08 +08:00
Angus Gratton
e6151c4394 bootloader: Force bootloader_image_hdr to be word aligned
Possible due to linker order for this file to be placed unaligned,
causing failure from bootloader_flash_read() function.
2020-06-02 18:13:37 +10:00
KonstantinKondrashov
3bb2d581c6 esp32: Reduce using ESP_EARLY_LOGx and move some code after the stdout initialization
After setting _GLOBAL_REENT, ESP_LOGIx can be used instead of ESP_EARLY_LOGx.

Closes: https://github.com/espressif/esp-idf/issues/5343
2020-06-01 20:36:08 +08:00
Ivan Grokhotkov
07bf1e23db bootloader_support: don't check signature when JTAG is attached
If an insecure configuration is enabled (no hardware secure boot, just
software signature check), skip the signature check in bootloader if
JTAG debugger is attached. This allows the debugger to set breakpoints
in Flash before the application runs.

Closes https://github.com/espressif/esp-idf/issues/4734
Closes https://github.com/espressif/esp-idf/issues/4878
2020-05-31 18:14:09 +02:00
Angus Gratton
f64ae4fa99 efuse: Add 'disable Download Mode' & ESP32-S2 'Secure Download Mode' functionality 2020-05-28 17:50:45 +10:00
Angus Gratton
48d9c14c28 efuse: Add new esp_efuse_read_field_bit() convenience function 2020-05-28 17:45:09 +10:00
Angus Gratton
1dd5a4dba4 efuse: Add new esp_efuse_write_field_bit() convenience function 2020-05-28 17:45:09 +10:00
Angus Gratton
9b822a3d2e esp32s2: Disable legacy boot mode & ROM remap modes if either Secure Boot or Flash Encryption is on 2020-05-28 17:45:09 +10:00
Angus Gratton
3e7ba2f389 bootloader: Don't print an error message after WDT reset in unicore mode
Caused some confusion here: https://github.com/espressif/esp-idf/issues/4388
2020-05-19 03:35:53 +00:00
Angus Gratton
cecf4622bc Merge branch 'bugfix/secure_boot_v2_fixes' into 'master'
Small secure boot v2 fixes

See merge request espressif/esp-idf!8462
2020-05-05 11:13:30 +08:00
Angus Gratton
d4d4d7324a efuse: Don't need to burn WR_CRYPT_CNT if CRYPT_CNT is already max
Reduces write cycles, and useful on ESP32 ECO3 as UART_DIS_DL is protected by
the same efuse.

Also fixes accidental macro definition introduced in 7635dce502
2020-05-01 16:16:47 +10:00
Felipe Neves
95bc186846 flash_encryption: Fix next spi boot crypt counter value after a plaintext flash 2020-04-24 12:43:47 -03:00
Felipe Neves
f7ccc081a5 flash_encryption: replace spi crypt count efuse burning function by a esp_efuse_API
flash_encryption: modify additional efuses burning method to fix them are not being written

flass_encryption: burn efuse to disable boot from RAM space

flash_encryption: added better checking for key generation state plus set read and write protect for them

soc esp32s2: Add register-level bit definitions for read & wrote protect bits

esp32s2: Fixes for flash encryption

- Write efuses in a batch
- Fix some detection of whether existing efuse blocks are read/write protected
2020-04-24 12:43:47 -03:00
Felipe Neves
6f27992430 flash_encryption: return more clear error codes when bootloader encryption fails 2020-04-24 12:43:47 -03:00