alex/esp-idf
alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2024-10-05 20:47:46 -04:00
Code Issues Actions 2 Packages Projects Releases Wiki Activity
26,206 Commits 20 Branches 148 Tags 384 MiB
b32a665f2c
Commit Graph

7 Commits

Author SHA1 Message Date
Darian Leung
a8a3756b38 hal: Route CPU and Interrupt Controller HAL/LL to esp_cpu calls 
This commit makes changes to cpu_ll.h, cpu_hal.h, and interrupt_controller_hal.h:

- Moved to esp_hw_support in order to be deprecated in the future
- HAL/LL API now route their calls to esp_cpu.h functions instead

Also updated soc_hal.h as follows:

- Removed __SOC_HAL_..._OTHER_CORES() macros as they dependend on cpu_hal.h
- Made soc_hal.h and soc_ll.h interfaces always inline, and removed soc_hal.c.

This commit also updates the XCHAL_ERRATUM_572 workaround by

- Removing it's HAL function and invoking the workaround it directly the bootloader
- Added missing workaround for the ESP32-S3
 2022-06-14 14:40:03 +08:00
Ivan Grokhotkov
3ce1fa70aa xtensa: update libhal for esp32s3 
Built from:
  https://github.com/foss-xtensa/xtensa-hal (commit b014610)

With toolchain:
  xtensa-esp32s3-elf-gcc (crosstool-NG esp-2021r1) 8.4.0

Commands:

  ./configure --host=xtensa-esp32s3-elf CC=xtensa-esp32s3-elf-gcc \
    CFLAGS="-mlongcalls -I$IDF_PATH/components/xtensa/esp32s3/include"

  make

  xtensa-esp32s3-elf-strip --strip-debug src/hal/libhal.a
 2021-06-29 16:56:35 +02:00
Ivan Grokhotkov
ca5ed172a5 xtensa: update configuration overlay for esp32s3 
From LX7_ESP32_S3_MP_linux_redist.tgz with SHA256:
63f305a982b2ee94cc78e5c20e3e3eb8bf0edeeaf703af0227a418bc34f7b848
copied from xtensa-elf/arch/include/xtensa/config/ with changes:
1) pre-commit fixes applied
2) re-added CONFIGID0 and CONFIGID1 in specreg.h
 2021-06-29 16:56:35 +02:00
Renz Bagaporo
1efdcd69d9 xtensa: move out trax 2021-02-26 19:45:48 +08:00
Angus Gratton
66fb5a29bb Whitespace: Automated whitespace fixes (large commit) 
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
 2020-11-11 07:36:35 +00:00
Michael (XIAO Xufeng)
5425ef4ee4 hal: extract hal component from soc component 2020-09-01 13:25:32 +08:00
morris
7232bc8360 xtensa: add CPU overlay files for esp32s3 2020-06-12 11:41:23 +08:00