This changes `memalign` (and `posix_memalign`) so that it uses an
allocation method with the same selection criteria (checking
`malloc_alwaysinternal_limit` and picking one of:
- always MALLOC_CAP_INTERNAL
- MALLOC_CAP_INTERNAL first with fallback
- MALLOC_CAP_SPIRAM first with fallback
`malloc_alwaysinternal_limit` is in turn set by the options
`CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL` and
`CONFIG_SPRIAM_USE_CAPS_ALLOC`.
This notably affects folks using esp-rs to build rust code for the
esp-idf, as all allocations from rust use `memalign`.
Merges https://github.com/espressif/esp-idf/pull/12375
In order to enable CONFIG_HEAP_TASK_TRACKING, some kind
of poisoning had to be enabled (!HEAP_POISONING_DISABLED).
However since those functionalities don't seem to be related
in any way, this commit decouple them by removing
MULTI_HEAP_BLOCK_OWNER from poison_head_t in multi_heap_poisoning.c
and handling the block ownership in heap_caps.c instead.
Note that handling task tracking in multi_heap.c would necessitate
updating the ROM implementation of multi_heap.c as well. For this
reason, the task tracking feature has to be handled in heap_caps.c.
Add test configuration to run all tests with heap component in the flash.
Add reference to this new configuration in performance section of the documentation.
- Fix "test get allocated size"
- Add tests for the free / alloc hooks
- Call alloc function hook on malloc/realloc/calloc base functions
- Add caps parameter to the allocation hook function
Since DRAM and IRAM are superposed on esp32c6 it is not necessary to convert a freshly allocated
DRAM addr to its IRAM equivalent when MALLOC_CAP_EXEC is passed to heap_caps_malloc(). Instead,
proceed with a default allocation since the address returned by multi_heap_malloc() already belongs
to the IRAM region.
Applies for esp32c6 and every boards with superposed DRAM and IRAM addresses.
this commits:
- adds build-time test to check that no call to flash regions are done from IRAM functions
- resolves problems related to IRAM function using content in flash memory
- update heap_caps_alloc_failed to use a default function name in DRAM
when necessary instead of creating a function name variable in DRAM for
each call of heap_caps_alloc_failed. This allows to save some extra bytes
in RAM.
Don't call heap_caps_alloc_failed() for malloc(0) and calloc(0), because it is not an error.
Improve handling of malloc(0) and calloc(0).
Merges https://github.com/espressif/esp-idf/pull/9517
heap_caps_*_prefer functions will now only call heaps_caps_alloc_failed
callback if all attempts to allocation memory fail (and not after each attempt
anymore).
* Closes https://github.com/espressif/esp-idf/issues/9086
heap: ported tlsf allocator into multi heap
heap_host_tests: added tlsf allocator into host test
heap_host_test: update freebytes after using free
heap_tests: tlsf now passing on host tests without poisoning
multi_heap: added support for memalign using tlsf implementation
heap_caps: removed heap_caps_aligned_free
heap/test: fixed broken aligned alloc test build
heap: added poisoning pattern when blocks are being merged
heap/tests: added timing tests for memory allocation
heap: reduced tlsf structure overhead
heap/tlsf: made all short functions inside of tlsf module as inline to improve timings
heap: moved tlsf heap routines outside of flash memory
newlib: linked multiheap memalign with newlib memalign function
heap: moved block member functions to a separate file so multi_heap can use the functions
heap/test: improved the tlsf timing test
heap/test: added memalign on aligned alloc tests
heap: moved tlsf configuration constants to a separated file
heap: added random allocations test with timings
heap: modified the calculation of heap free bytes
heap: make aligned free true deprecated functions and update their documentation
heap: add extra assert after successive mallocs on small allocation host test
heap: remove legacy aligned alloc implementation.
performance: added malloc and free time performance default values
Goal is that multiple faults would be required to bypass a boot-time signature check.
- Also strengthens some address range checks for safe app memory addresses
- Change pre-enable logic to also check the bootloader signature before enabling SBV2 on ESP32
Add some additional checks for invalid sections:
- Sections only partially in DRAM or IRAM are invalid
- If a section is in D/IRAM, allow the possibility only some is in D/IRAM
- Only pass sections that are entirely in the same type of RTC memory region
