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Merge branch 'fix/malloc_cap_exec_on_esp32c6' into 'master'
heap: Fix allocation issue when trying to allocate in IRAM on esp32c6 Closes IDF-6306 See merge request espressif/esp-idf!22077
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commit
a26ecafa0d
@ -20,6 +20,16 @@ extern "C" {
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/** The content of this file is to be kept in sync with the common section of esp_memory_utils.h **/
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/**
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* @brief Check if the IRAM and DRAM are separate or using the same memory space
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*
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* @return true if the DRAM and IRAM are sharing the same memory space, false otherwise
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*/
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__attribute__((always_inline))
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inline static bool esp_dram_match_iram(void) {
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return (SOC_DRAM_LOW == SOC_IRAM_LOW && SOC_DRAM_HIGH == SOC_IRAM_HIGH);
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}
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/**
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* @brief Check if the pointer is in iram
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*
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@ -20,6 +20,16 @@ extern "C" {
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/** Common functions, to be kept in sync with bootloader_memory_utils.h **/
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/**
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* @brief Check if the IRAM and DRAM are separate or using the same memory space
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*
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* @return true if the DRAM and IRAM are sharing the same memory space, false otherwise
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*/
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__attribute__((always_inline))
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inline static bool esp_dram_match_iram(void) {
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return (SOC_DRAM_LOW == SOC_IRAM_LOW && SOC_DRAM_HIGH == SOC_IRAM_HIGH);
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}
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/**
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* @brief Check if the pointer is in iram
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*
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@ -3,8 +3,3 @@
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components/heap/host_test/host_test_linux:
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enable:
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- if: IDF_TARGET == "linux"
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components/heap/test_apps:
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disable_test:
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- if: IDF_TARGET == "esp32c6"
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temporary: true
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reason: target esp32c6 is not supported yet
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@ -131,7 +131,9 @@ IRAM_ATTR static void *heap_caps_malloc_base( size_t size, uint32_t caps)
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//doesn't cover, see if they're available in other prios.
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if ((get_all_caps(heap) & caps) == caps) {
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//This heap can satisfy all the requested capabilities. See if we can grab some memory using it.
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if ((caps & MALLOC_CAP_EXEC) && esp_ptr_in_diram_dram((void *)heap->start)) {
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// If MALLOC_CAP_EXEC is requested but the DRAM and IRAM are on the same addresses (like on esp32c6)
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// proceed as for a default allocation.
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if ((caps & MALLOC_CAP_EXEC) && !esp_dram_match_iram() && esp_ptr_in_diram_dram((void *)heap->start)) {
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//This is special, insofar that what we're going to get back is a DRAM address. If so,
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//we need to 'invert' it (lowest address in DRAM == highest address in IRAM and vice-versa) and
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//add a pointer to the DRAM equivalent before the address we're going to return.
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@ -278,3 +278,23 @@ TEST_CASE("RTC memory shoule be lowest priority and its free size should be big
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free(ptr);
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}
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#endif
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TEST_CASE("test memory protection features", "[heap][mem_prot]")
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{
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// try to allocate memory in IRAM and check that if memory protection is active,
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// no memory is being allocated
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uint32_t *iram_ptr = heap_caps_malloc(4, MALLOC_CAP_EXEC);
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#ifndef CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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// System memory protection not active, check that iram_ptr is not null
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// Check that iram_ptr is in IRAM
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TEST_ASSERT_NOT_NULL(iram_ptr);
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TEST_ASSERT(true == esp_ptr_in_iram(iram_ptr));
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// free the memory
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heap_caps_free(iram_ptr);
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#else
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// System memory protection is active, DIRAM seen as DRAM, iram_ptr should be null
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TEST_ASSERT_NULL(iram_ptr);
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#endif // CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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}
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@ -1,4 +1,4 @@
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# SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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# SPDX-License-Identifier: CC0-1.0
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import pytest
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@ -92,3 +92,18 @@ def test_heap_trace_dump(dut: Dut) -> None:
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dut.expect_exact('Enter next test, or \'enter\' to see menu')
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dut.write('[heap-trace]')
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dut.expect_unity_test_output(timeout=100)
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@pytest.mark.generic
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@pytest.mark.supported_targets
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@pytest.mark.temp_skip_ci(targets=['esp32c3', 'esp32s3'], reason='test failed')
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@pytest.mark.parametrize(
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'config',
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[
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'mem_prot'
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]
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)
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def test_memory_protection(dut: Dut) -> None:
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dut.expect_exact('Press ENTER to see the list of tests')
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dut.write('[heap][mem_prot]')
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dut.expect_unity_test_output(timeout=300)
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1
components/heap/test_apps/sdkconfig.ci.mem_prot
Normal file
1
components/heap/test_apps/sdkconfig.ci.mem_prot
Normal file
@ -0,0 +1 @@
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CONFIG_ESP_SYSTEM_MEMPROT_FEATURE=y
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