alex/esp-idf
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131 Commits

Author SHA1 Message Date
Jiang Jiang Jian
1bd6dffbef Merge branch 'bugfix/fix_maximum_value_of_config_rtc_clk_cal_cycles_bug_v5.0' into 'release/v5.0' 
ESP All Chip: fixed the maximum value of config RTC_CLK_CAL_SYCLES bug (v5.0)

See merge request espressif/esp-idf!29650
 2024-03-15 11:19:14 +08:00
hongshuqing
44815d75eb fix: fix_maximum_value_of_config_rtc_clk_cal_cycle_bug 2024-03-14 16:22:39 +08:00
chaijie@espressif.com
9a3a74463a fix: fix sleep fast_mem & slow_mem may lost bug 2024-03-14 15:18:57 +08:00
nilesh.kale
14d7caa921 fix(esp_hw_support): update hmac toggle method due to discrepency in ROM code 
Need to update the HMAC enable/disable method due to discrepancy in ROM code
across different targets for the esp_hmac_disable() API.
 2024-03-12 12:24:51 +05:30
nilesh.kale
1cd2bb4b22 fix(esp_hw_support): fix API esp_hmac_disable_jtag() to disable JTAG 
After ets_hmac_disable(), invalidating JTAG register process is ineffective.
So, added call to enable hmac begore invalidating JTAG REG.
And similarly disabled it after invalidation.
 2024-01-16 14:40:09 +05:30
Jakob Hasse
900ee4e7a6 fix(esp_hw_support): Removed unused include directories from cmake 
* Closes https://github.com/espressif/esp-idf/issues/12700
 2023-12-04 14:12:18 +08:00
Michael (XIAO Xufeng)
893725dd40 feat(soc): Increase max supported version of C3 to 1.99 2023-11-29 15:52:09 +08:00
Armando
f8500f77b1 fix(adc): rename ADC_ATTEN_DB_11 to ADC_ATTEN_DB_12 
By design, it's 12 dB. There're errors among chips, so the actual
attenuation will be 11dB more or less
 2023-11-07 14:12:50 +08:00
Jiang Guang Ming
0e99be11f0 fix(esp32c3): Update esp32c3 chip revision 2023-10-30 20:56:57 +08:00
wuzhenghui
652bc76354 fix(lightsleep): fix access pu_cfg after sleep wakeup which is linked to flash 2023-07-31 21:36:27 +08:00
Michael (XIAO Xufeng)
1b04acf68f Merge branch 'bugfix/fix_chip_broken_bug_in_monitor_mode_c2c3s2s3_to_v5.0' into 'release/v5.0' 
ESP32S2/C3/C2: fixed S2 dangerous power parameters in sleep modes and support S2/C3/C2 different sleep mode(v5.0)

See merge request espressif/esp-idf!23754
 2023-06-13 17:50:21 +08:00
hongshuqing
d82af7f54a fix chip broken bug in monitor mode for c2 c3 s2 s3 to v5.0 2023-06-13 10:22:40 +08:00
Jiang Jiang Jian
838850abab Merge branch 'feature/example_deep_sleep_wake_stub_backport_v5.0' into 'release/v5.0' 
example: add deepsleep_wake stub example (backport v5.0)

See merge request espressif/esp-idf!23414
 2023-06-12 11:07:59 +08:00
jiangguangming
4261fd0940 rtc_time.c: simplify the rtc_time_get with LL function 2023-05-04 16:46:15 +08:00
Armando
08c77a7eaf sar: init sar periph power state 2023-04-27 10:52:38 +08:00
Li Shuai
d84cdace52 sleep: fix sleep current issue caused by sar adc 2023-04-20 11:45:58 +08:00
Armando
85980884d7 adc: improve adc power logic 2023-04-20 10:34:37 +08:00
liuning
6b5bc6304a rtc_sleep: workaround systimer stall issue during lightsleep on ESP32C3 2023-03-29 21:19:21 +08:00
Jiang Jiang Jian
dc172b63d3 Merge branch 'bugfix/close_rf_in_deep_sleep_backport_v5.0' into 'release/v5.0' 
deep sleep: further optimize sleep current if RF is enabled (backport v5.0)

See merge request espressif/esp-idf!22738
 2023-03-20 15:48:29 +08:00
wuzhenghui
568dd3d823 Revert "optimize deep sleep current in wifi softap mode" 
This reverts commit 344ec80fadae35cadf46b997b7758bf5f1873946.
 2023-03-13 20:49:36 +08:00
jingli
833f201610 soc/soc_caps: update soc caps for chips that support power-down of modem hardware 2023-03-13 13:33:18 +08:00
KonstantinKondrashov
823024c10c all: Apply new version logic (major * 100 + minor) 2023-01-06 02:00:52 +08:00
wuzhenghui
0af1ed8813 bugfix: esprv_intc_int_set_type should not use bitmap parameter 2022-10-14 15:39:24 +08:00
cje
d7dcb88fdc C3: Fix system not stable bug when dbias storing in efuse is bigger than 27 2022-10-08 11:59:32 +08:00
jingli
9fa4bb272e esp_hw_support/clk_cali: fix xtal32k error detect 2022-09-21 16:21:11 +08:00
songruojing
e8915e14e7 esp_hw_support: fix wrong register access to set/clear rtc fast mem low power mode on c3 and h2 2022-08-03 14:33:13 +08:00
Armando
5e6a16380a esp_adc: move adc common hw related code into esp_hw_support 2022-07-28 03:49:48 +00:00
morris
5e50ec1d66 systimer: add helper functions to convert between tick and us 2022-07-25 16:08:52 +08:00
Guillaume Souchere
0bac33ed41 esp_system: Remove deprecate section from esp_cpu.h 
- Remove esp_cpu_in_ocd_mode() from esp_cpu.h. Users should call esp_cpu_dbgr_is_attached() instead.
- Remove esp_cpu_get_ccount() from esp_cpu.h. Users should call esp_cpu_get_cycle_count() instead.
- Remove esp_cpu_set_ccount() from esp_cpu.h. Users should call esp_cpu_set_cycle_count() instead.
- Other IDF components updated to call esp_cpu_dbgr_is_attached(), esp_cpu_get_cycle_count() and esp_cpu_set_cycle_count() as well.
 2022-07-22 00:06:06 +08:00
Guillaume Souchere
6005cc9163 hal: Deprecate interrupt_controller_hal.h, cpu_hal.h and cpu_ll.h interfaces 
This commit marks all functions in interrupt_controller_hal.h, cpu_ll.h and cpu_hal.h as deprecated.
Users should use functions from esp_cpu.h instead.
 2022-07-22 00:06:06 +08:00
Martin Vychodil
0c87ae2a91 System/Security: Memprot API unified (ESP32S3) 
Added missing features and improvements
 2022-07-09 22:57:51 +02:00
KonstantinKondrashov
0f8ff5aa15 efuse: Adds major and minor versions and others 2022-07-05 14:38:27 +08:00
Omar Chebib
cd48baf979 Refactor: move regi2c_*.h header files from esp_hw_support to soc component 
When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
 2022-06-30 09:40:44 +00:00
morris
7fd9a91034 dma: move from driver to hw_support 2022-06-28 14:17:12 +08:00
Omar Chebib
8fae0f0753 G0: Support Xtensa targets for G0-only compilation 
G0-only example now supports Xtensa targets. This means that G0 layer
does not depend on G1+ layers anymore
 2022-06-20 11:34:20 +00:00
Martin Vychodil
339fcbf14d System/Security: Memprot API unified (ESP32S3) 
Unified Memory protection API for all PMS-aware chips - ESP32S3 port
 2022-06-20 02:36:44 +00:00
Omar Chebib
752026a174 Merge branch 'refactor/remove_g0_dep_on_g1_riscv' into 'master' 
G0: RISC-V targets have now an independent G0 layer

See merge request espressif/esp-idf!17926
 2022-06-16 11:53:39 +08:00
Darian
e213e66ba3 Merge branch 'refactor/esp_hw_support_cpu' into 'master' 
esp_hw_support: Add new esp_cpu.h abstraction

Closes IDF-4769

See merge request espressif/esp-idf!17091
 2022-06-14 21:11:30 +08:00
Omar Chebib
2fd784c97a G0 RISC-V: Remove "private_include/regi2c_brownout.h" header as it has been moved and simplify "regi2c_ctrl.h" 2022-06-14 15:00:53 +08:00
Omar Chebib
5bcd9b2db8 G0: RISC-V targets have now an independent G0 layer 
G0 doesn't depend on any G1+ layer for RISC-V based targets
 2022-06-14 15:00:53 +08:00
Darian Leung
61eb7baa6b esp_hw_support: Add esp_cpu.h abstraction and API 
This commit updates the esp_cpu.h API. The new API presents a new
abstraction of the CPU where CPU presents the following interfaces:

- CPU Control (to stall/unstall/reset the CPU)
- CPU Registers (to read registers commonly used in SW such as SP, PC)
- CPU Interrupts (to inquire/allocate/control the CPUs 32 interrupts)
- Memory Port (to configure the CPU's memory bus for memory protection)
- Debugging (to configure/control the CPU's debugging port)

Note: Also added FORCE_INLINE_ATTR to the DoxyFile in order to pass doc
        builds for esp_cpu.h
 2022-06-14 14:30:58 +08:00
Darian Leung
556ec30457 esp_hw_support: Rename cpu_util.c to cpu.c 2022-06-14 14:30:57 +08:00
songruojing
03477a59db rtc_clk: Fix rtc8m calibration failure after cpu/core reset 
1. make sure 8md256 clk is enabled before calibration
2. improve bootloader and application startup 8m, 8md256 enable logic
 2022-06-13 17:47:51 +08:00
songruojing
c8752cee6a clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem 2022-06-13 17:47:50 +08:00
KonstantinKondrashov
ac4c7d99fe dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00
Anton Maklakov
afde2434e8 memprot: fix type casting to avoid suspesious address arithmetic 2022-05-30 14:48:12 +07:00
songruojing
729d70129a clk_tree: add initial docs for clock tree 2022-05-24 22:59:51 +08:00
songruojing
a5b09cf015 rtc_clk: Clean up some clock related enum and macro in soc/rtc.h, replace with new ones in 
soc/clk_tree_defs.h
 2022-05-24 22:59:41 +08:00
songruojing
436085de51 rtc_clk: fix potential "division by zero" in rtc_clk_cpu_freq_mhz_to_config (found by coverity scan) 2022-05-23 13:38:41 +08:00
songruojing
87b917c04a rtc_clk: Remove the ck8m fpu logic when setting rtc slow clock source, ck8m fpu in sleep logic is now completely handled in sleep_modes.c 2022-05-21 13:13:52 +00:00