esp_system: removed repeated interrupt allocator code and moved common code to esp_system
xtens: moved xtensa specific code from freertos to the xtensa component
hal/interrupt_controller: added interrupt controller hal and ll files
docs: update the doxyfile with new location of esp_itr_alloc.h file
xtensa: fixed dangerous relocation problem after moving xtensa interrupt files out of freertos
docs: removed Xtensa reference from intr_allocator api-reference
xtensa: pushed the interrupt function that manages non iram interrupts to the xtensa layer
esp_system/test: fixed platform dependent setting for intr_allocator tests
hal: rename the functions used to manage non iram interrupt mask.
correct generation.py script to be silent when file: function is not in the object list (just ignore placement)
correct linker.lf to place task functions into flash if CONFIG_FREERTOS_TASK_FUNCTIONS_INTO_FLASH is active otherwise into IRAM
update kconfig option to place functions into IRAM
update linker file after tests
fix spi_device_polling_end crash when xTaskGetTickCount() in flash
disable "yield from lower priority task, other CPU" test case when placing rtos functions into flash
upadate ut app config freertos_flash
combine spi_flash driver and freertos ut configs into one file
remove TEST_EXCLUDE_COMPONENTS
ci: fix ut job
remove functions that are called from ISR funcs
add port module functions to place into Flash
place snapshot funcs into Flash when ESP_PANIC_HANDLER_IRAM is not set
ci: add job with tags UT_T1_GPIO,ESP32_IDF
Commit 891eb3b0 was fixing an issue with PS and EPC1 not being
preserved after the window spill procedure. It did so by saving PS in
a2 and EPC1 in a4. However the a4 register may be a live register of
another window in the call stack, and if it is overwritten and then
spilled to the stack, then the corresponding register value will end
up being corrupted. In practice the problem would show up as an
IllegalInstruction exception, when trying to return from a function
when a0 value was 0x40020.
Fix by using a0 register instead of a4 as scratch. Also fix a comment
about xthal_save_extra_nw, as this function in fact doesn't clobber
a4 or a5 because XCHAL_NCP_NUM_ATMPS is defined as 1.
Closes https://github.com/espressif/esp-idf/issues/5758
* changing dependencies from unity->cmock
* added component.mk and Makefile.projbuild
* ignore test dir in gen_esp_err_to_name.py
* added some brief introduction of CMock in IDF
CONFIG_FREERTOS_ISR_STACKSIZE was set to 2100 when ELF core dump was
enabled, which resulted in a non-16-byte-aligned interrupt stack
offset. This triggered "is SP corrupted" check in the backtrace,
terminating the backtrace early.
Fix the default value, and make sure that the stack is always aligned,
regardless of the value of CONFIG_FREERTOS_ISR_STACKSIZE.
This MR uses an intermediary function `start_app` to call after system
initialization instead of `app_main`.
In RTOS builds, freertos provides `start_app` and calls `app_main`.
In non-RTOS builds, user provides `start_app` directly.
Changes the startup flow to the ff:
hardware -> core libraries init -> other libraries init -> os
init (optional) -> app_main
- hardware init resides in the port layer, and is the entry point
- core libraries init executes init functions of core components
- other libraries init executes init functions of other components (weak
references)
- after other lib is init, the app_main function is called, however,
an OS can wrap the real call to app_main to init its own stuff, and
*then* call the real app_main
FreeRTOS scheduler uses additional stack space, as in some functions
variables are placed onto the stack instead of registers.
This issue resulted in occasional stack overflows in dport task, when
compiling at -O0 optimization level.
- Increase the configMINIMAL_STACK_SIZE to 1kB.
- Enable the watchpoint at the end of stack in CI startup test for
this optimization level.
This fixes the issue where XTOS_SET_INTLEVEL would lower INTLEVEL from
4 to 3, when eTaskGetState is invoked during the core dump, triggered
from the interrupt watchdog.
`xQueueGenericCreateStatic` is placed into flash by the linker script to
reduce IRAM usage. This will also cause the `xRingbufferCreate` not
not callable when cache is disabled.
The SPI bus lock on SPI1 introduces two side effects:
1. The device lock for the main flash requires the
`CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION` to be selected, however this
option is disabled by default in earlier IDF versions. Some developers
may find their project cannot be built by their old sdkconfig files.
2. Usually we don't need the lock on the SPI1 bus, due to it's
restrictions. However the overhead still exists in this case, the IRAM
cost for static version of semaphore functions, and the time cost when
getting and releasing the lock.
This commit:
1. Add a CONFIG_SPI_FLASH_BYPASS_MAIN_LOCK option, which will forbid the
space cost, as well as the initialization of the main bus lock.
2. When the option is not selected, the bus lock is used, the
`CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION` will be selected explicitly.
3. Revert default value of `CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION`
to `n`.
introduced in 49a48644e4.
Closes https://github.com/espressif/esp-idf/issues/5046
Configurable option to use IRAM as byte accessible memory (in single core mode) using
load-store (non-word aligned and non-word size IRAM access specific) exception handlers.
This allows to use IRAM for use-cases where certain performance penalty
(upto 170 cpu cycles per load or store operation) is acceptable. Additional configuration
option has been provided to redirect mbedTLS specific in-out content length buffers to
IRAM (in single core mode), allows to save 20KB per TLS connection.
1. Clarify THREADPTR calculation in FreeRTOS code, explaining where
the constant 0x10 offset comes from.
2. On the ESP32-S2, .flash.rodata section had different default
alignment (8 bytes instead of 16), which resulted in different offset
of the TLS sections. Unfortunately I haven’t found a way to query
section alignment from C code, or to use a constant value to define
section alignment in the linker script. The linker scripts are
modified to force a fixed 16 byte alignment for .flash.rodata on the
ESP32 and ESP32-S2beta. Note that the base address of .flash.rodata
was already 16 byte aligned, so this has not changed the actual
memory layout of the application.
Full explanation of the calculation below.
Assume we have the TLS template section base address
(tls_section_vma), the address of a TLS variable in the template
(address), and the final relocation value (offset). The linker
calculates:
offset = address - tls_section_vma + align_up(TCB_SIZE, alignment).
At run time, the TLS section gets copied from _thread_local_start
(in .rodata) to task_thread_local_start. Let’s assume that an address
of a variable in the runtime TLS section is runtime_address.
Access to this address will happen by calculating THREADPTR + offset.
So, by a series of substitutions:
THREADPTR + offset = runtime_address THREADPTR = runtime_address - offset
THREADPTR = runtime_address - (address - tls_section_vma + align_up(TCB_SIZE, alignment)) THREADPTR = (runtime_address - address) + tls_section_vma - align_up(TCB_SIZE, alignment)
The difference between runtime_address and address is same as the
difference between task_thread_local_start and _thread_local_start.
And tls_section_vma is the address of .rodata section, i.e.
_rodata_start. So we arrive to
THREADPTR = task_thread_local_start - _thread_local_start + _rodata_start - align_up(TCB_SIZE, alignment).
The idea with TCB_SIZE being added to the THREADPTR when computing
the relocation was to let the OS save TCB pointer in the TREADPTR
register. The location of the run-time TLS section was assumed to be
immediately after the TCB, aligned to whatever the section alignment
was. However in our case the problem is that the run-time TLS section
is stored not next to the TCB, but at the top of the stack. Plus,
even if it was stored next to the TCB, the size of a FreeRTOS TCB is
not equal to 8 bytes (TCB_SIZE hardcoded in the linker). So we have
to calculate THREADPTR in a slightly obscure way, to compensate for
these differences.
Closes IDF-1239
spin_lock: cleaned-up port files and removed portmux files
components/soc: decoupled compare and set operations from FreeRTOS
soc/spinlock: filled initial implementation of spinlock refactor
It will decouple the spinlocks into separated components with not depencences of freertos
an similar interface was provided focusing the readabillity and maintenance, also
naming to spinlocks were adopted. On FreeRTOS side the legacy portMUX macros
gained a form of wrapper functions that calls the spinlocks component thus
minimizing the impact on RTOS side.
This feature aims to close IDF-967
soc/spinlock: spinlocks passed on unit test, missing test corner cases
components/compare_set: added better function namings plus minor performance optimization on spinlocks
soc/spinlock: code reordering to remove ISC C90 mix error
freertos/portmacro: gor rid of critical sections multiline macros, placed inline functions instead
soc/spinlock: improved spinlock performance from internal RAM
For cases where the spinlock is executed from IRAM, there is no
need to check where the spinlock object is placed on memory,
removing this checks caused a great improvement on performance.
components/freertos: cleaned up multicore option scheduler.
components/freertos: more cleanup and test optimization to present realistic results
components/freertos: remove unused macros of optimized task selection when multicore is used
freertos/Kconfig: fix trailing space on optimized scheduler option
freertos/tests: moved test context variables inside of test task.
The public variables used on scheduling time test now were packed into a structure allocated on test case task stack and passed to tasks as arguments saving RAM comsumption.
FreeRTOS have an platform dependent configuration to enable selection task in a optimized way.
Provided the platform dependent functions in order to allow the scheduler to use the optimized algorithms by telling to the port layer where to found bitscan instruction i.e. NSAU.
This closes IDF-1116
components/freertos: added option to disable the optimized scheduler
bugfix/pthread: fix pthread_once() race condiion possibility adding critical section in compare and set function
Closes IDFGH-2448
See merge request espressif/esp-idf!7236
DISABLED_FOR_TARGETS macros are used
Partly revert "ci: disable unavailable tests for esp32s2beta"
This partly reverts commit 76a3a5fb48.
Partly revert "ci: disable UTs for esp32s2beta without runners"
This partly reverts commit eb158e9a22.
Partly revert "fix unit test and examples for s2beta"
This partly reverts commit 9baa7826be.
Partly revert "efuse: Add support for esp32s2beta"
This partly reverts commit db84ba868c.
newlib/assert: replace unlikely with likely to keep original assertion
newlib/assert: fix assert macro that uses likely
freertos/port: add the missing sdkconfig.h back
newlib/assert: assert macro back to a single line
esp_common/esp_compiler: renamed esp_macros file to a more specific one
esp_common/esp_compiler: removed CONTAINER_OF macro, it was a duplicate
components/freertos: placed likely macros around port and critical sections
component/freertos: placed likely macros on lists module
components/freertos: placed unlikely macros inside of assertion points, they likely wont fail
components/freertos: added likely macros on queue modules
FreeRTOS queues are one of most hot code path, because to queues itself tend to
be used a lot by the applications, besides that, queues are the basic primitive
to form both mutexes and semaphores, The focus here is to place likely
macros inside lowest level send and receive routines, since they're common
from all kobjects: semaphores, queues, mutexes and FR internals (like timer queue)
components/lwip: placed likely/unlikey on net-interfaces code
components/fatfs: added unlikely macros on disk drivers code
components/spiffs: added unlikely macros on low level fs driver
components/freertos: added likely/unlikely macros on timers and ticker
freertos/event_group: placed likely/unlikely macros on hot event group code paths
components/sdmmc: placed likely / unlikely macros on lower level path of sdmmc
components/bt: placed unlikely macros around bt HCI functions calling
components/lwip: added likely/unlikely macros on OS port code section
components/freertos: fix code style on tick handler
Since in b0491307, which has introduced the optimized window spill
procedure, _xt_context_save did not work correctly when called from
_xt_syscall_exc. This was because unlike _xt_lowint1, _xt_syscall_exc
does not save PS and EPC1. The new version of _xt_context_save
modified PS (on purpose) and EPC1 (accidentally, due to window
overflow exceptions), which resulted in a crash upon 'rfi' from the
syscall.
This commit adds restoring of PS and EPC1 in _xt_context_save. It also
slightly reduces the number of instructions used to prepare PS for
window spill.
Unit test for setjmp/longjmp (which were broken by this regression)
is added.
Closes https://github.com/espressif/esp-idf/issues/4541
1. add hal and low-level layer for timer group
2. add callback functions to handle interrupt
3. add timer deinit function
4. add timer spinlock take function
Regression introduced in commit 79e74e5d5f
It is possible that some FreeRTOS APIs are invoked prior to
scheduler start condition (e.g. flash initialization in unicore mode).
In that condition these asserts should not trigger (scheduler state being yet to be started),
hence changes per this fix.
This commit fixes thread safety issues with configASSERT() calls
regarding the value of uxSchedulerSuspended. A false negative
occurs if a context switch to the opposite core occurs in between
the getting the core ID and the assesment.
Closes https://github.com/espressif/esp-idf/issues/4230
esp32s2beta: Merge support to master
Closes IDF-513, IDF-756, IDF-758, IDF-999, IDF-753, IDF-749, IDF-754, IDF-840, and IDF-755
See merge request espressif/esp-idf!6100
1. Since BLE full-scan feature for BLE mesh change the controller code cause this problem,
it cause coex semaphore take in "interrupt disable", then it may cause task schedule
and cause crash in freertos
2. Fix newlib lock ISR context and critical section check
3. Fix bt controller ISR context and critical section check
Rename and add multiple kconfig compiler options. New compiler options
COMPILER_OPTIMIZATION_PERF and COMPILER_OPTIMIZATION_NONE have been added.
Optimize "Debug" and "Release" options to "Default" and "Size" respectively.
This commit also does the following:
- The COMPILER_OPTIMIZATION_PERF option introduced multiple bug.
This commit fixes those bugs.
- build.yml also updated to test for the new optimization options.
This macro is used in places which expect it to work even without dual core being on.
Still make "mux" functions in FreeRTOS into no-ops as the mux is not needed.
Do not include bootloader in flash target when secure boot is enabled.
Emit signing warning on all cases where signed apps are enabled (secure
boot and signed images)
Follow convention of capital letters for SECURE_BOOT_SIGNING_KEY
variable, since it is
relevant to other components, not just bootloader.
Pass signing key and verification key via config, not requiring
bootloader to know parent app dir.
Misc. variables name corrections
This commit refactors backtracing within the panic handler so that a common
function esp_backtrace_get_next_frame() is used iteratively to traverse a
callstack.
A esp_backtrace_print() function has also be added that allows the printing
of a backtrace at runtime. The esp_backtrace_print() function allows unity to
print the backtrace of failed test cases and jump back to the main test menu
without the need reset the chip. esp_backtrace_print() can also be used as a
debugging function by users.
- esp_stack_ptr_is_sane() moved to soc_memory_layout.h
- removed uncessary includes of "esp_debug_helpers.h"
!4452 used setting LINK_LIBRARIES and INTERFACE_LINK_LIBRARIES to link
components built under ESP-IDF build system. However, LINK_LIBRARIES does
not produce behavior same as linking PRIVATE. This MR uses the new
signature for target_link_libraries directly instead. This also moves
setting dependencies during component registration rather than after all
components have been processed.
The consequence is that internally, components have to use the new
signature form as well. This does not affect linking the components to
external targets, such as with idf_as_lib example. This only affects
linking additional libraries to ESP-IDF libraries outside component processing (after
idf_build_process), which is not even possible for CMake<v3.13 as
target_link_libraries is not valid for targets not created in current
directory. See https://cmake.org/cmake/help/v3.13/policy/CMP0079.html#policy:CMP0079
Using xxx_periph.h in whole IDF instead of xxx_reg.h, xxx_struct.h, xxx_channel.h ... .
Cleaned up header files from unnecessary headers (releated to soc/... headers).
port*_CRITICAL_SAFE API calls port*_CRITICAL or port*_CRITICAL_ISR
depending on the context (Non-ISR or ISR respectively).
FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE Kconfig option added
Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
xTaskIncrementTick have to unwind uxPendedTicks on CPU1 and CPU0.
Use case: If an erase operation was run on the CPU1 then it leads
to starving other tasks which waiting time. Waited tasks just skipped.
Closes: https://github.com/espressif/esp-idf/issues/1952
Closes: IDF-183
This MR removes the common dependency from every IDF components to the SOC component.
Currently, in the ``idf_functions.cmake`` script, we include the header path of SOC component by default for all components.
But for better code organization (or maybe also benifits to the compiling speed), we may remove the dependency to SOC components for most components except the driver and kernel related components.
In CMAKE, we have two kinds of header visibilities (set by include path visibility):
(Assume component A --(depends on)--> B, B is the current component)
1. public (``COMPONENT_ADD_INCLUDEDIRS``): means this path is visible to other depending components (A) (visible to A and B)
2. private (``COMPONENT_PRIV_INCLUDEDIRS``): means this path is only visible to source files inside the component (visible to B only)
and we have two kinds of depending ways:
(Assume component A --(depends on)--> B --(depends on)--> C, B is the current component)
1. public (```COMPONENT_REQUIRES```): means B can access to public include path of C. All other components rely on you (A) will also be available for the public headers. (visible to A, B)
2. private (``COMPONENT_PRIV_REQUIRES``): means B can access to public include path of C, but don't propagate this relation to other components (A). (visible to B)
1. remove the common requirement in ``idf_functions.cmake``, this makes the SOC components invisible to all other components by default.
2. if a component (for example, DRIVER) really needs the dependency to SOC, add a private dependency to SOC for it.
3. some other components that don't really depends on the SOC may still meet some errors saying "can't find header soc/...", this is because it's depended component (DRIVER) incorrectly include the header of SOC in its public headers. Moving all this kind of #include into source files, or private headers
4. Fix the include requirements for some file which miss sufficient #include directives. (Previously they include some headers by the long long long header include link)
This is a breaking change. Previous code may depends on the long include chain.
You may need to include the following headers for some files after this commit:
- soc/soc.h
- soc/soc_memory_layout.h
- driver/gpio.h
- esp_sleep.h
The major broken include chain includes:
1. esp_system.h no longer includes esp_sleep.h. The latter includes driver/gpio.h and driver/touch_pad.h.
2. ets_sys.h no longer includes soc/soc.h
3. freertos/portmacro.h no longer includes soc/soc_memory_layout.h
some peripheral headers no longer includes their hw related headers, e.g. rom/gpio.h no longer includes soc/gpio_pins.h and soc/gpio_reg.h
BREAKING CHANGE
1. separate rom include files and linkscript to esp_rom
2. modefiy "include rom/xxx.h" to "include esp32/rom/xxx.h"
3. Forward compatible
4. update mqtt
