Commit Graph

136 Commits

Author SHA1 Message Date
Tian Hao
2bb67985dc component/bt : move some codes of controller to iram
1. mv codes which called by sir into iram
2. mv libcoexist.a into iram
2017-01-18 16:38:06 +08:00
Ivan Grokhotkov
9aa0e29079 deep sleep: keep RTC_SLOW_MEM powered on if data is placed into RTC slow memory 2017-01-12 14:15:30 +08:00
Ivan Grokhotkov
e4811216ff deep sleep: fix regression due to moving ets_update_cpu_frequency into IRAM
Deep sleep stub may call ets_update_cpu_frequency, which has been moved from ROM to IRAM.
Restore the ROM version in the linker script, call it ets_update_cpu_frequency_rom, use it in the deep sleep stub.
2017-01-12 14:15:25 +08:00
Ivan Grokhotkov
edd924f273 sdmmc: add peripheral driver and protocol layer 2017-01-09 04:51:24 +08:00
Ivan Grokhotkov
4f909b8ecc Merge branch 'bugfix/ets_delay_on_app_cpu' into 'master'
esp32: ets_update_cpu_frequency should set tick scale for both CPUs

ets_update_cpu_frequency ROM function updates g_ticks_per_us, which is has two copies, one for each CPU.
The APP CPU copy of g_ticks_per_us never got updated, resulting in shorter delays produced by ets_delay_us on the APP CPU.

This MR replaces ROM ets_update_cpu_frequency with a copy in IRAM which updates scaling factors on both of the CPUs.

So now we get expected delays (in microseconds):
```
ets_delay_us core=0 expected=50000 actual=50014
ets_delay_us core=1 expected=50000 actual=50015
vTaskDelay core=0 expected=50000 actual=49428
vTaskDelay core=1 expected=50000 actual=50000
```

Reported on the forum: http://esp32.com/viewtopic.php?f=2&t=713#p3722

See merge request !373
2017-01-07 18:45:14 +08:00
Liu Zhi Fu
a575b9e893 esp32: modify ld file to fix a crash issue 2017-01-07 16:12:07 +08:00
Ivan Grokhotkov
1cbc2fa046 esp32: ets_update_cpu_frequency should set tick scale for both CPUs 2017-01-06 15:00:17 +08:00
Ivan Grokhotkov
61c6ce86d2 esp32: put .data before .bss
This change reduces chances that a large .bss segment will push .data all the way into
0x3ffe1320 — 0x3ffe5320 range where the bootloader stack is, creating a problem when
bootloader will be loading application into memory.
With this change, .data would need to be at least 200k big to cause problems.
2017-01-06 13:46:06 +08:00
Angus Gratton
5e96070c27 linker script: Remove KEEP from RAM-resident sections
Reduce RAM usage when not all data/bss sections in source files were used.
2017-01-03 11:02:12 +11:00
Jeroen Domburg
78161a1fe3 Replace non-multicore-aware rom funcs with multicore-aware funcs, ESP_LOG->ESP_EARLY_LOG fix, reserve ints used in wireless libs. Fixes WiFi crashing 2016-12-13 13:24:01 +08:00
Ivan Grokhotkov
221dc13535 newlib: add "full" formatting support, add missing functions
- add two versions of libc: libc.a and libc_nano.a. First one has full C99 formatting support, second one uses “nano” formatting functions available in ROM.
- fix linker error for fmod, fmodf, atof, atoff
- update tests
2016-12-08 11:04:54 +08:00
Tian Hao
55e0690f69 component/bt : wifi/bt software coexist option
1. option of sw coexist
2. cpu set freq function modify
3. update lib
4. ld add static data address
2016-11-24 19:57:47 +08:00
Ivan Grokhotkov
f18c1f13b1 Merge branch 'feature/deepsleep_stub_linker' into 'master'
Deep sleep: Any source named rtc_wake_stub* is linked as RTC wake stub code

Also move esp_deepsleep.h documentation out to docs/deep-sleep-stub.rst

See merge request !142
2016-11-01 22:27:13 +08:00
Jeroen Domburg
309bd12855 Re-add panic.o to IRAM/DRAM. 2016-10-28 14:32:11 +08:00
Ivan Grokhotkov
999e6d4e8f freertos: move panic handler data to DRAM
Fixes https://ezredmine.espressif.com/issues/7817
2016-10-27 17:57:29 +08:00
Angus Gratton
1413ec3ff0 Remove SPIUnlock from linker script symbols
Add a comment about why it was removed and where it went.
2016-10-21 17:50:37 +11:00
Angus Gratton
8e8caca2e2 Replace ROM SPIUnlock function with a version that can't lock flash
Avoid bug where a bad status read is copied back to flash and can set
lock bits.
2016-10-21 16:12:51 +11:00
Ivan Grokhotkov
42827ff869 bootloader, menuconfig: add flash size setting support 2016-10-21 15:27:25 +11:00
Angus Gratton
da70611196 Deep sleep: Any source named rtc_wake_stub* is linked as RTC wake stub code
Also move esp_deepsleep.h documentation out to docs/deep-sleep-stub.rst
2016-10-19 15:58:37 +11:00
Jeroen Domburg
5cd3bd5c4b Add data memory for RMT peripheral 2016-10-08 13:15:06 +08:00
jack
4e092be6d6 Add Comments
We reserve 4KB Slow RTC memory to save RF calibation result and BT NVS data.
If not all these Slow RTC momory Blocks are used, we will open the other parts.
2016-09-29 16:29:13 +08:00
Angus Gratton
103a2a0079 esp32: Allow RTC slow memory to be reserved for ULP coprocessor 2016-09-28 11:15:29 +08:00
Angus Gratton
2c6ab8579a esp32: Pass memory layout linker script through C preprocessor
C preprocessor is a bit icky, but with ULP we will have 3 possible
variables influencing the memory layout and 9 linker scripts is too
many!
2016-09-28 11:15:29 +08:00
Angus Gratton
7c494055e3 esp32: Bootloader wake deep sleep stub
App can contain a stub program resident in RTC fast memory. Bootloader
will load the stub on initial boot. If the device wakes from deep sleep,
the stub is run immediately (before any other data is loaded, etc.)

To implement a custom wake stub, implement a function in your program:

```
void RTC_IRAM_ATTR esp_wake_deep_sleep(void)
{
  esp_default_wake_deep_sleep();
  // other wake logic
}
```

... and it will replace the default implementation.
2016-09-28 11:14:58 +08:00
Ivan Grokhotkov
fcccec4a3b Merge branch 'master' into feature/btdm_controller
* master: (32 commits)
  components/nghttp: rename Makefile to component.mk
  components/nghttp: add HTTP2.0 protocol feature
  compoenents/esp32: don't alias start_cpu1 to start_cpu0_default
  components/freertos: fix a bug with an uninitialised return value
  Change application entry point name back to app_main
  gitlab-ci: build SSC with matching branch name, if available
  components/spi_flash: remove stray level of indentation
  components/nvs: fix broken sentences in comment blocks
  components/esp32: fix renaming of esp_event_set_cb, minor clean up
  components/esp32: remove "_user" part from entry points, weaken start_cpu0/1
  Fix a spelling mistake in panic message, add carriage return to stack canary message
  components/lwip,esp32: fixes for C++
  components/bt: fix compilation, remove ./ from makefile
  components/esp32: clarify type of queue in wifi_init_config_t, add default init macro
  components/esp32: add ESP_ERROR_CHECK
  Event handling refactoring
  clean up warnings
  components/esp32,bt: fix typos in comments
  Startup flow refactoring
  Roll back submodule version
  ...
2016-09-27 12:40:56 +08:00
wangmengyang
b9167f70cd component/bt: add VHCI mutex protetion
1. add mutex to VHCI APIs
2. remove bss/data log print during initialization;
3. add bss/data symbols in esp32.rom.ld
4. add & modify BTDM OSI functions
2016-09-26 18:52:15 +08:00
Ivan Grokhotkov
62aaec630c components/esp32: remove "_user" part from entry points, weaken start_cpu0/1
With this change applications can override very early part of startup procedure by implementing "start_cpu0" and "start_cpu1" functions.
2016-09-26 12:29:00 +08:00
Ivan Grokhotkov
b936441b9b Startup flow refactoring
This change removes implicit WiFi/BT initialization from startup code.
"main" task is started once essential part of startup code is complete.
This task calls application-provided "int main(void)" function, which can call WiFi/BT init functions if necessary.
2016-09-26 00:50:57 +08:00
Ivan Grokhotkov
ff2750ab07 components/esp32: move peripheral symbols to separate ld script 2016-09-19 15:05:32 +08:00
Wangjialin
489b4f31a9 add peripheral module struct headers 2016-09-18 03:14:18 +08:00
jack
24011ddd05 header files: modify rom code and soc header files
1. timer reg file for both time group 0 and time group 1, not only timer group 0
2. fix bug that io mux header file mismatch with chip
3. fix bug that some BASE address not correct
4. add some static function to eagle.fpga32.rom.addr.v7.ld
5. add interrupts usage table
6. add some comments for rom code functions
2016-09-12 17:47:49 +08:00
Wu Jian Gang
ef36779bd3 ld: add ld for bt/trace, choose different ld by menuconfig 2016-08-25 11:34:21 +08:00
Wu Jian Gang
3e8bb67e75 ld: fix ld to use ram as much as possible, rearrange heap_alloc area 2016-08-25 11:07:53 +08:00
Wu Jian Gang
c3102e8fb2 ld: seperate/rename eagle.xxx.ld to esp32.xxx.ld 2016-08-25 11:07:53 +08:00
Ivan Grokhotkov
9e57466c96 components/esp32: fix DRAM_ATTR attribute
This change places contents of .dram1 section into .dram0.data.
Also removes .iram1pro/.iram1app/.dram1pro/.dram1app which weren't used anywhere.
2016-08-24 17:20:00 +08:00
Ivan Grokhotkov
bd6ea4393c Initial public version 2016-08-17 23:08:22 +08:00