add API to get chip info
This change adds an API to get chip info, such as chip model, enabled capabilities, size of embedded flash, silicon revision.
Hello_world example is modified to print out the information about the chip. The example is also simplified by moving all code into the main task.
Ref TW12031.
See merge request !549
Optimize configuration of base MAC address
Application developer can call APIs to configure base MAC address
instead of using menuconfig.
See merge request !744
component/esp32 : fix dualcore bug
1. When dual core cpu run access DPORT register, must do protection.
2. If access DPORT register, must use DPORT_REG_READ/DPORT_REG_WRITE and DPORT_XXX register operation macro.
See merge request !742
1. When dual core cpu run access DPORT register, must do protection.
2. If access DPORT register, must use DPORT_REG_READ/DPORT_REG_WRITE and DPORT_XXX register operation macro.
optimize scan before station connecting to AP
1. Store the information of AP(ssid, password, bssid, channel, etc)
into nvs when station connects to AP successfully. If station
connects to the same AP next time, it will scan the stored channel of the AP
first.
2. Add a parameter of channel for scanning before connecting to AP.
If the channel is set to 0, station will scan full channels. If it
is set to 1~13, station will only scan the channel.
See merge request !704
1. Store the information of AP(ssid, password, bssid, channel, etc)
into nvs when station connects to AP successfully. If station
connects to the same AP next time, it will scan the stored channel of the AP
first.
2. Add a parameter of channel for scanning before connecting to AP.
If it is set to 1~13, station will scan starting from the channel.
If the channel of AP is unknown, set it to 0.
esp32: Core dump sanity checks
Adds sanity checks when doing core dump to flash
- CRC for core dump flash partition config
- Tasks with corrupted TCBs are skipped
- Assertions to check that nothing is written beyond core dump flash partition
Ref TW11879
See merge request !686
- CRC for core dump flash partition config
- Tasks with corrupted TCBs are skipped
- Assertions to check that nothing is written beyond core dump flash partition
- RTC_CNTL_SLOWCLK_FREQ define is removed; rtc_clk_slow_freq_get_hz
function can be used instead to get an approximate RTC_SLOW_CLK
frequency
- Clock calibration is performed at startup. The value is saved and used
for timekeeping and when entering deep sleep.
- When using the 32k XTAL, startup code will wait for the oscillator to
start up. This can be possibly optimized by starting a separate task
to wait for oscillator startup, and performing clock switch in that
task.
- Fix a bug that 32k XTAL would be disabled in rtc_clk_init.
- Fix a rounding error in rtc_clk_cal, which caused systematic frequency
error.
- Fix an overflow bug which caused rtc_clk_cal to timeout early if the
slow_clk_cycles argument would exceed certain value
- Improve 32k XTAL oscillator startup time by introducing bootstrapping
code, which uses internal pullup/pulldown resistors on 32K_N/32K_P
pins to set better initial conditions for the oscillator.
Base MAC address can be stored in default manufacture-defined or customer
pre-defined place in EFUSE and other place e.g. flash or EEPROM.
If choose to use base MAC address which is stored in other place, please
call esp_base_mac_addr_set_external() before initializing WiFi/BT/Ehternet.
- Implements application tracing module which allows to send arbitrary
data to host over JTAG. This feature is useful for analyzing
program modules behavior, dumping run-time application data etc.
- Implements printf-like logging functions on top of apptrace module.
This feature is a kind of semihosted printf functionality with lower
overhead and impact on system behaviour as compared to standard printf.
Detect invalid cache access
This MR adds always-on feature which detects cache invalid access and triggers panic handler when invalid access interrupt is raised.
See merge request !660
Confusion here is that original ROM has two functions:
* SPIReadModeCnfig() - sets mode, calls enable_qio_mode/disable_qio_mode
* SPIMasterReadModeCnfig() - As above, but doesn't set QIO mode in status register
However we never want to use the ROM method to set/clear QIO mode flag, as not all flash chips work this way. Instead we
do it in flash_qio_mode.c in bootloader.
So in both cases (ROM or "patched ROM") we now call SPIMasterReadModeCnfig(), which is now named
esp_rom_spiflash_config_readmode().
Introduce soc component, add source of rtc_clk and rtc_pm libraries
This MR adds parts of the RTC library source code (initialization, clock selection functions, sleep functions). WiFi-related power management functions are kept inside the precompiled library. Most of RTC library APIs have been renamed.
Default CPU frequency option in Kconfig is set to 160MHz, pending qualification of 240MHz mode at high temperatures.
Register header files are moved into the new soc component, which will contain chip-specific header files and low-level non-RTOS-aware APIs (such as rtc_ APIs). Some of the files from ESP32 component were also moved: cpu_util.c, brownout.c, and the corresponding header files. Further refactoring of ESP32 component into more meaningful layers (chip-specific low level functions; chip-specific RTOS aware functions; framework-specific RTOS-related functions) will be done in future MRs.
See merge request !633
1) fixed SPI_read_status: added check for flash busy flag in matrix mode
2) fixed SPI_page_program: enable write before writing data to SPI FIFO
3) SPI flash ROM funcs replacement is controlled via menuconfig option
fix warnings generated by ESP_ERROR_CHECK(variable) in release builds
This uses the same pattern as “assert” in release builds to silence the
warning. At the same time, we make sure that if a statement is wrapped
into ESP_ERROR_CHECK, it is executed in release build as well.
Fixes https://github.com/espressif/esp-idf/issues/497
See merge request !641
This uses the same pattern as “assert” in release builds to silence the
warning. At the same time, we make sure that if a statement is wrapped
into ESP_ERROR_CHECK, it is executed in release build as well.
If static tx buffer is selected, WiFi tx buffers are allocated when WiFi is initialized and released
when WiFi is de-initialized. If dynamic tx buffer is selected, WiFi tx buffer is allocated when tx
data is delivered from LWIP to WiFi and released when tx data is sent out by WiFi.
The size of each static tx buffers is fixed to about 1.6KB and the size of dynamic tx buffers is
depend on the length of the data delivered from LWIP.
If PSRAM is enabled, "STATIC" should be selected to guarantee enough WiFi tx buffers.
If PSRAM is disabled, "DYNAMIC" should be selected to improve the utilization of RAM.
ULP coprocessor toolchain integration
- build system support for ULP coprocessor toolchain
- documentation for ULP coprocessor instruction set
- documentation for ULP code execution flow, loading programs, exchanging data
- example: counting pulses using ULP
See merge request !394
Reset WIFI mac when wifi start and update wifi lib
1. reset wifi mac when wifi start
2. roll back rx hung workaround for beacon timeout
3. fix amsdu ap interface wrong issue
4. fix amsdu header parse error
5. fix amsdu flag wrong issue
6. PHY: V350, fix BT rssi bug
7. RTC: V225, fix bt will be not work when wifi is reset
See merge request !606
1. reset wifi mac when wifi start
2. roll back rx hung workaround for beacon timeout
3. fix amsdu ap interface wrong issue
4. fix amsdu header parse error
5. fix amsdu flag wrong issue
6. PHY: V350, fix BT rssi bug
7. RTC: V225, fix bt will be not work when wifi is reset
1. Add low speed channels for LEDC module.
2. Improve fade object allocate mechanism.
3. Improve ledc example, add 2 low speed channels in example.
4. Remove debug code
5. Improve the register bit field name of slow clock.
add wakeup from touch sensor, and deep sleep example
- add new deep sleep wakeup mode
- change documentation to explain incompatibilities between different wakeup mode, add error checks
- add new ULP instructions necessary for ULP wakeup scenario
- fix issues with I_WR_REG, I_SLEEP, I_END instructions
- add deep sleep example, illustrating the use of timer, gpio, touch, and ULP wakeup triggers
See merge request !461
component/bt: optimize stack size of Bluetooth Tasks and make them be configurab…
Bluetooth tasks' stack size are optimized and can be configured by the CONFIG_NEWLIB_NANO_FORMAT option.
See merge request !559
Feature/add user set mac
1. Add menuconfig for user to set mac address of wifi, bt and ethernet.
2. Add the number of MAC address generated from efuse for user to choose.
3. Add MAC address derive method.
See merge request !542
This change adds esp_deep_sleep_get_wakeup_cause, which returns the
source which has caused wakeup from deep sleep.
Similar to esp_deep_sleep_get_ext1_wakeup_status, a function is added
to check touch pad wakeup status: esp_deep_sleep_get_touchpad_wakeup_status.
This function returns the touch pad which has caused wakeup.
ULP and touch FSMs in ESP32 revisions 0 and 1 do not operate correctly
if RTC_PERIPH power domain is force powered on (ESP_PD_OPTION_ON).
Both ULP and touch still work, but clock frequency of the ULP may be
incorrect and touch values may be off by considerable amount. As such,
when these wakeup modes are used, RTC_PERIPH power domain has to be set
to ESP_PD_OPTION_AUTO (or, in the current implementation,
ESP_PD_OPTION_OFF — though this will change in the future when _OFF will
actually *force* the power domain to be powered off).
Because EXT0 wakeup source requires RTC_PERIPH to be powered ON, mark
ULP and touch wakeup sources as incompatible with EXT0. Workaround for
this is to use EXT1 wakeup source instead, which offers similar or
better functions without having to keep RTC_PERIPH powered on.
1. add a macro in menuconfig for users to choose whether store phy calibration data into NVS or not.
2. rename some disable phy and rf APIs so that existing code which calls old APIS will fail to compile.
1. Add disable PHY and RF when WiFi and BT are both disabled(including call sniffer disable API).
2. Do not init PHY and RF when cpu start. Init PHY and RF when call Wifi or BT start APIs(including sniffer enable API).
3. Add a temporary lib: librtc_clk.a and will delete it when CPU frequency switching function is done.
4. Add an function to get OS tick rate.
5. Do not put the whole pp.a in iram0, only put lmac.o, ieee80211_misc.o, ets_time.o and wdev.o in iram0.
If using WIFI_INIT_CONFIG_DEFAULT, error message will point out lack
of WiFi. Otherwise linker errors on WiFi symbols should help give a
clue as to what is broken.
Piggy-backs on changes in !420, ref github #230#237
esp32 core dump to flash
1. menuconfig option to select where to store core dump: flash, uart or disable
2. Saving of core dump to flash
3. Partition table definitions files with core dump partition
4. Python scripts to support core dump generation from GDB command line
See merge request !341
Deep sleep stub may call ets_update_cpu_frequency, which has been moved from ROM to IRAM.
Restore the ROM version in the linker script, call it ets_update_cpu_frequency_rom, use it in the deep sleep stub.
1) PS is fixed up to allow GDB backtrace to work properly
2) MR!341 discussion: in core dump module: esp_panicPutXXX was replaced by ets_printf.
3) MR!341 discussion: core dump flash magic number was changed.
4) MR!341 discussion: SPI flash access API was redesigned to allow flexible critical section management.
5) test app for core dump feature was added
6) fixed base64 file reading issues on Windows platform
7) now raw bin core file is deleted upon core loader failure by epscoredump.py
