mirror of
https://github.com/espressif/esp-idf.git
synced 2024-09-20 00:36:01 -04:00
Merge branch 'feature/tighter_rom_memory_defines' into 'master'
Use more regions reserved for ROM routines/stack we don't use for heap. This frees up about 28K of RAM. See merge request !467
This commit is contained in:
Jeroen Domburg
commit
dc6c19f560
@ -38,7 +38,7 @@
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#include "tcpip_adapter.h"
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#include "heap_alloc_caps.h"
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#include "esp_heap_alloc_caps.h"
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#include "sdkconfig.h"
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#include "esp_system.h"
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#include "esp_spi_flash.h"
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@ -106,8 +106,6 @@ void IRAM_ATTR call_start_cpu0()
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memset(&_rtc_bss_start, 0, (&_rtc_bss_end - &_rtc_bss_start) * sizeof(_rtc_bss_start));
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}
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// Initialize heap allocator
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heap_alloc_caps_init();
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ESP_EARLY_LOGI(TAG, "Pro cpu up.");
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@ -131,6 +129,15 @@ void IRAM_ATTR call_start_cpu0()
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ESP_EARLY_LOGI(TAG, "Single core mode");
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CLEAR_PERI_REG_MASK(DPORT_APPCPU_CTRL_B_REG, DPORT_APPCPU_CLKGATE_EN);
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#endif
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/* Initialize heap allocator. WARNING: This *needs* to happen *after* the app cpu has booted.
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If the heap allocator is initialized first, it will put free memory linked list items into
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memory also used by the ROM. Starting the app cpu will let its ROM initialize that memory,
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corrupting those linked lists. Initializing the allocator *after* the app cpu has booted
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works around this problem. */
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heap_alloc_caps_init();
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ESP_EARLY_LOGI(TAG, "Pro cpu start user code");
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start_cpu0();
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}
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@ -250,6 +257,8 @@ static void main_task(void* args)
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// Now that the application is about to start, disable boot watchdogs
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REG_CLR_BIT(TIMG_WDTCONFIG0_REG(0), TIMG_WDT_FLASHBOOT_MOD_EN_S);
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REG_CLR_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN);
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//Enable allocation in region where the startup stacks were located.
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heap_alloc_enable_nonos_stack_tag();
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app_main();
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vTaskDelete(NULL);
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}
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@ -36,6 +36,7 @@ hardwiring addresses.
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//Amount of priority slots for the tag descriptors.
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#define NO_PRIOS 3
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typedef struct {
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const char *name;
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uint32_t prio[NO_PRIOS];
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@ -46,6 +47,9 @@ typedef struct {
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Tag descriptors. These describe the capabilities of a bit of memory that's tagged with the index into this table.
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Each tag contains NO_PRIOS entries; later entries are only taken if earlier ones can't fulfill the memory request.
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Make sure there are never more than HEAPREGIONS_MAX_TAGCOUNT (in heap_regions.h) tags (ex the last empty marker)
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WARNING: The current code assumes the ROM stacks are located in tag 1; no allocation from this tag can be done until
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the FreeRTOS scheduler has started.
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*/
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static const tag_desc_t tag_desc[]={
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{ "DRAM", { MALLOC_CAP_DMA|MALLOC_CAP_8BIT, MALLOC_CAP_32BIT, 0 }, false}, //Tag 0: Plain ole D-port RAM
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@ -89,8 +93,8 @@ This array is *NOT* const because it gets modified depending on what pools are/a
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static HeapRegionTagged_t regions[]={
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{ (uint8_t *)0x3F800000, 0x20000, 15, 0}, //SPI SRAM, if available
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{ (uint8_t *)0x3FFAE000, 0x2000, 0, 0}, //pool 16 <- used for rom code
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{ (uint8_t *)0x3FFB0000, 0x8000, 0, 0}, //pool 15 <- can be used for BT
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{ (uint8_t *)0x3FFB8000, 0x8000, 0, 0}, //pool 14 <- can be used for BT
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{ (uint8_t *)0x3FFB0000, 0x8000, 0, 0}, //pool 15 <- if BT is enabled, used as BT HW shared memory
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{ (uint8_t *)0x3FFB8000, 0x8000, 0, 0}, //pool 14 <- if BT is enabled, used data memory for BT ROM functions.
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{ (uint8_t *)0x3FFC0000, 0x2000, 0, 0}, //pool 10-13, mmu page 0
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{ (uint8_t *)0x3FFC2000, 0x2000, 0, 0}, //pool 10-13, mmu page 1
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{ (uint8_t *)0x3FFC4000, 0x2000, 0, 0}, //pool 10-13, mmu page 2
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@ -134,6 +138,16 @@ static HeapRegionTagged_t regions[]={
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{ NULL, 0, 0, 0} //end
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};
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/* For the startup code, the stacks live in memory tagged by this tag. Hence, we only enable allocating from this tag
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once FreeRTOS has started up completely. */
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#define NONOS_STACK_TAG 1
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static bool nonos_stack_in_use=true;
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void heap_alloc_enable_nonos_stack_tag()
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{
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nonos_stack_in_use=false;
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}
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//Modify regions array to disable the given range of memory.
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static void disable_mem_region(void *from, void *to) {
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@ -185,28 +199,43 @@ void heap_alloc_caps_init() {
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//Disable the bits of memory where this code is loaded.
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disable_mem_region(&_data_start, &_heap_start); //DRAM used by bss/data static variables
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disable_mem_region(&_init_start, &_iram_text_end); //IRAM used by code
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disable_mem_region((void*)0x3ffae000, (void*)0x3ffb0000); //knock out ROM data region
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disable_mem_region((void*)0x40070000, (void*)0x40078000); //CPU0 cache region
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disable_mem_region((void*)0x40078000, (void*)0x40080000); //CPU1 cache region
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// TODO: this region should be checked, since we don't need to knock out all region finally
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disable_mem_region((void*)0x3ffe0000, (void*)0x3ffe8000); //knock out ROM data region
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/* Warning: The ROM stack is located in the 0x3ffe0000 area. We do not specifically disable that area here because
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after the scheduler has started, the ROM stack is not used anymore by anything. We handle it instead by not allowing
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any mallocs from tag 1 (the IRAM/DRAM region) until the scheduler has started.
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The 0x3ffe0000 region also contains static RAM for various ROM functions. The following lines
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reserve the regions for UART and ETSC, so these functions are usable. Libraries like xtos, which are
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not usable in FreeRTOS anyway, are commented out in the linker script so they cannot be used; we
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do not disable their memory regions here and they will be used as general purpose heap memory.
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Enabling the heap allocator for this region but disabling allocation here until FreeRTOS is started up
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is a somewhat risky action in theory, because on initializing the allocator, vPortDefineHeapRegionsTagged
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will go and write linked list entries at the start and end of all regions. For the ESP32, these linked
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list entries happen to end up in a region that is not touched by the stack; they can be placed safely there.*/
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disable_mem_region((void*)0x3ffe0000, (void*)0x3ffe0440); //Reserve ROM PRO data region
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disable_mem_region((void*)0x3ffe4000, (void*)0x3ffe4350); //Reserve ROM APP data region
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#if CONFIG_BT_ENABLED
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#if CONFIG_BT_DRAM_RELEASE
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disable_mem_region((void*)0x3ffb0000, (void*)0x3ffb3000); //knock out BT data region
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disable_mem_region((void*)0x3ffb8000, (void*)0x3ffbbb28); //knock out BT data region
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disable_mem_region((void*)0x3ffbdb28, (void*)0x3ffc0000); //knock out BT data region
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disable_mem_region((void*)0x3ffb0000, (void*)0x3ffb3000); //Reserve BT data region
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disable_mem_region((void*)0x3ffb8000, (void*)0x3ffbbb28); //Reserve BT data region
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disable_mem_region((void*)0x3ffbdb28, (void*)0x3ffc0000); //Reserve BT data region
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#else
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disable_mem_region((void*)0x3ffb0000, (void*)0x3ffc0000); //knock out BT data region
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disable_mem_region((void*)0x3ffb0000, (void*)0x3ffc0000); //Reserve BT hardware shared memory & BT data region
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#endif
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disable_mem_region((void*)0x3ffae000, (void*)0x3ffaff10); //Reserve ROM data region, inc region needed for BT ROM routines
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#else
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disable_mem_region((void*)0x3ffae000, (void*)0x3ffae2a0); //Reserve ROM data region
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#endif
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#if CONFIG_MEMMAP_TRACEMEM
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#if CONFIG_MEMMAP_TRACEMEM_TWOBANKS
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disable_mem_region((void*)0x3fff8000, (void*)0x40000000); //knock out trace mem region
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disable_mem_region((void*)0x3fff8000, (void*)0x40000000); //Reserve trace mem region
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#else
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disable_mem_region((void*)0x3fff8000, (void*)0x3fffc000); //knock out trace mem region
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disable_mem_region((void*)0x3fff8000, (void*)0x3fffc000); //Reserve trace mem region
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#endif
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#endif
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@ -317,6 +346,10 @@ void *pvPortMallocCaps( size_t xWantedSize, uint32_t caps )
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for (prio=0; prio<NO_PRIOS; prio++) {
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//Iterate over tag descriptors for this priority
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for (tag=0; tag_desc[tag].prio[prio]!=MALLOC_CAP_INVALID; tag++) {
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if (nonos_stack_in_use && tag == NONOS_STACK_TAG) {
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//Non-os stack lives here and is still in use. Don't alloc here.
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continue;
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}
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if ((tag_desc[tag].prio[prio]&caps)!=0) {
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//Tag has at least one of the caps requested. If caps has other bits set that this prio
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//doesn't cover, see if they're available in other prios.
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@ -38,6 +38,16 @@
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*/
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void heap_alloc_caps_init();
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/**
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* @brief Enable the memory region where the startup stacks are located for allocation
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*
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* On startup, the pro/app CPUs have a certain memory region they use as stack, so we
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* cannot do allocations in the regions these stack frames are. When FreeRTOS is
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* completely started, they do not use that memory anymore and allocation there can
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* be re-enabled.
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*/
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void heap_alloc_enable_nonos_stack_tag();
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/**
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* @brief Allocate a chunk of memory which has the given capabilities
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*
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@ -75,4 +85,6 @@ size_t xPortGetFreeHeapSizeCaps( uint32_t caps );
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*/
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size_t xPortGetMinimumEverFreeHeapSizeCaps( uint32_t caps );
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#endif
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@ -1,34 +1,3 @@
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// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef HEAP_ALLOC_CAPS_H
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#define HEAP_ALLOC_CAPS_H
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#define MALLOC_CAP_EXEC (1<<0) //Memory must be able to run executable code
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#define MALLOC_CAP_32BIT (1<<1) //Memory must allow for aligned 32-bit data accesses
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#define MALLOC_CAP_8BIT (1<<2) //Memory must allow for 8/16/...-bit data accesses
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#define MALLOC_CAP_DMA (1<<3) //Memory must be able to accessed by DMA
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#define MALLOC_CAP_PID2 (1<<4) //Memory must be mapped to PID2 memory space
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#define MALLOC_CAP_PID3 (1<<5) //Memory must be mapped to PID3 memory space
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#define MALLOC_CAP_PID4 (1<<6) //Memory must be mapped to PID4 memory space
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#define MALLOC_CAP_PID5 (1<<7) //Memory must be mapped to PID5 memory space
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#define MALLOC_CAP_PID6 (1<<8) //Memory must be mapped to PID6 memory space
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#define MALLOC_CAP_PID7 (1<<9) //Memory must be mapped to PID7 memory space
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#define MALLOC_CAP_SPISRAM (1<<10) //Memory must be in SPI SRAM
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#define MALLOC_CAP_INVALID (1<<31) //Memory can't be used / list end marker
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void heap_alloc_caps_init();
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void *pvPortMallocCaps(size_t xWantedSize, uint32_t caps);
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#endif
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#pragma once
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#warning heap_alloc_caps.h has been renamed to esp_heap_alloc_caps.h. The old header file is deprecated and will be removed in v3.0.
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#include "esp_heap_alloc_caps.h"
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@ -60,7 +60,6 @@ PROVIDE ( cache_sram_mmu_set = 0x400097f4 );
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PROVIDE ( calc_rtc_memory_crc = 0x40008170 );
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PROVIDE ( calloc = 0x4000bee4 );
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PROVIDE ( _calloc_r = 0x4000bbf8 );
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PROVIDE ( check_pos = 0x400068b8 );
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PROVIDE ( _cleanup = 0x40001df8 );
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PROVIDE ( _cleanup_r = 0x40001d48 );
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PROVIDE ( __clear_cache = 0x40063860 );
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@ -101,7 +100,6 @@ PROVIDE ( dbg_state = 0x3ffb8d5d );
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PROVIDE ( DebugE256PublicKey_x = 0x3ff97428 );
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PROVIDE ( DebugE256PublicKey_y = 0x3ff97408 );
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PROVIDE ( DebugE256SecretKey = 0x3ff973e8 );
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PROVIDE ( _DebugExceptionVector = 0x40000280 );
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PROVIDE ( debug_timer = 0x3ffe042c );
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PROVIDE ( debug_timerfn = 0x3ffe0430 );
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PROVIDE ( dh_group14_generator = 0x3ff9ac60 );
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@ -127,7 +125,6 @@ PROVIDE ( __divdi3 = 0x4000ca84 );
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PROVIDE ( __divsc3 = 0x40064200 );
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PROVIDE ( __divsf3 = 0x4000234c );
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PROVIDE ( __divsi3 = 0x4000c7b8 );
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PROVIDE ( _DoubleExceptionVector = 0x400003c0 );
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PROVIDE ( dummy_len_plus = 0x3ffae290 );
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PROVIDE ( __dummy_lock = 0x4000c728 );
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PROVIDE ( __dummy_lock_try = 0x4000c730 );
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@ -141,69 +138,8 @@ PROVIDE ( __eqdf2 = 0x400636a8 );
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PROVIDE ( __eqsf2 = 0x40063374 );
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PROVIDE ( esp_crc8 = 0x4005d144 );
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PROVIDE ( _etext = 0x4000d66c );
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PROVIDE ( ets_aes_crypt = 0x4005c9b8 );
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PROVIDE ( ets_aes_disable = 0x4005c8f8 );
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PROVIDE ( ets_aes_enable = 0x4005c8cc );
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PROVIDE ( ets_aes_set_endian = 0x4005c928 );
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PROVIDE ( ets_aes_setkey_dec = 0x4005c994 );
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PROVIDE ( ets_aes_setkey_enc = 0x4005c97c );
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PROVIDE ( ets_bigint_disable = 0x4005c4e0 );
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PROVIDE ( ets_bigint_enable = 0x4005c498 );
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PROVIDE ( ets_bigint_mod_mult_getz = 0x4005c818 );
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PROVIDE ( ets_bigint_mod_mult_prepare = 0x4005c7b4 );
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PROVIDE ( ets_bigint_mod_power_getz = 0x4005c614 );
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PROVIDE ( ets_bigint_mod_power_prepare = 0x4005c54c );
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PROVIDE ( ets_bigint_montgomery_mult_getz = 0x4005c7a4 );
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PROVIDE ( ets_bigint_montgomery_mult_prepare = 0x4005c6fc );
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PROVIDE ( ets_bigint_mult_getz = 0x4005c6e8 );
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PROVIDE ( ets_bigint_mult_prepare = 0x4005c630 );
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PROVIDE ( ets_bigint_wait_finish = 0x4005c520 );
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PROVIDE ( ets_delay_us = 0x40008534 );
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PROVIDE ( ets_efuse_get_8M_clock = 0x40008710 );
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PROVIDE ( ets_efuse_get_spiconfig = 0x40008658 );
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PROVIDE ( ets_efuse_program_op = 0x40008628 );
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PROVIDE ( ets_efuse_read_op = 0x40008600 );
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PROVIDE ( ets_get_cpu_frequency = 0x4000855c );
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PROVIDE ( ets_get_detected_xtal_freq = 0x40008588 );
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PROVIDE ( ets_get_xtal_scale = 0x4000856c );
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PROVIDE ( ets_install_putc1 = 0x40007d18 );
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PROVIDE ( ets_install_putc2 = 0x40007d38 );
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PROVIDE ( ets_install_uart_printf = 0x40007d28 );
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PROVIDE ( ets_post = 0x4000673c );
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PROVIDE ( ets_printf = 0x40007d54 );
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PROVIDE ( ets_readySet_ = 0x3ffe01f0 );
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PROVIDE ( ets_run = 0x400066bc );
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PROVIDE ( ets_secure_boot_check = 0x4005cb40 );
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PROVIDE ( ets_secure_boot_check_finish = 0x4005cc04 );
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PROVIDE ( ets_secure_boot_check_start = 0x4005cbcc );
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PROVIDE ( ets_secure_boot_finish = 0x4005ca84 );
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PROVIDE ( ets_secure_boot_hash = 0x4005cad4 );
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PROVIDE ( ets_secure_boot_obtain = 0x4005cb14 );
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PROVIDE ( ets_secure_boot_rd_abstract = 0x4005cba8 );
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PROVIDE ( ets_secure_boot_rd_iv = 0x4005cb84 );
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PROVIDE ( ets_secure_boot_start = 0x4005ca34 );
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PROVIDE ( ets_set_appcpu_boot_addr = 0x4000689c );
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PROVIDE ( ets_set_idle_cb = 0x40006674 );
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PROVIDE ( ets_set_startup_callback = 0x4000688c );
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PROVIDE ( ets_set_user_start = 0x4000687c );
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PROVIDE ( ets_sha_disable = 0x4005c0a8 );
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PROVIDE ( ets_sha_enable = 0x4005c07c );
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PROVIDE ( ets_sha_finish = 0x4005c104 );
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PROVIDE ( ets_sha_init = 0x4005c0d4 );
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PROVIDE ( ets_sha_update = 0x4005c2a0 );
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PROVIDE ( ets_startup_callback = 0x3ffe0404 );
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PROVIDE ( ets_task = 0x40006688 );
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PROVIDE ( ets_timer_arm = 0x40008368 );
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PROVIDE ( ets_timer_arm_us = 0x400083ac );
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PROVIDE ( ets_timer_disarm = 0x400083ec );
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PROVIDE ( ets_timer_done = 0x40008428 );
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PROVIDE ( ets_timer_handler_isr = 0x40008454 );
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PROVIDE ( ets_timer_init = 0x400084e8 );
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PROVIDE ( ets_timer_setfn = 0x40008350 );
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PROVIDE ( ets_unpack_flash_code = 0x40007018 );
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PROVIDE ( ets_unpack_flash_code_legacy = 0x4000694c );
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PROVIDE ( ets_update_cpu_frequency_rom = 0x40008550 ); /* Updates g_ticks_per_us on the current CPU only; not on the other core */
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PROVIDE ( ets_waiti0 = 0x400067d8 );
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PROVIDE ( exc_cause_table = 0x3ff991d0 );
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PROVIDE ( _exit_r = 0x4000bd28 );
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PROVIDE ( __extendsfdf2 = 0x40002c34 );
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@ -213,8 +149,6 @@ PROVIDE ( fflush = 0x40059394 );
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PROVIDE ( _fflush_r = 0x40059320 );
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PROVIDE ( __ffsdi2 = 0x4000ca2c );
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PROVIDE ( __ffssi2 = 0x4000c804 );
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PROVIDE ( FilePacketSendDeflatedReqMsgProc = 0x40008b24 );
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PROVIDE ( FilePacketSendReqMsgProc = 0x40008860 );
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PROVIDE ( _findenv_r = 0x40001f44 );
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PROVIDE ( __fixdfdi = 0x40002ac4 );
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PROVIDE ( __fixdfsi = 0x40002a78 );
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@ -223,11 +157,6 @@ PROVIDE ( __fixsfsi = 0x4000240c );
|
||||
PROVIDE ( __fixunsdfsi = 0x40002b30 );
|
||||
PROVIDE ( __fixunssfdi = 0x40002504 );
|
||||
PROVIDE ( __fixunssfsi = 0x400024ac );
|
||||
PROVIDE ( FlashDwnLdDeflatedStartMsgProc = 0x40008ad8 );
|
||||
PROVIDE ( FlashDwnLdParamCfgMsgProc = 0x4000891c );
|
||||
PROVIDE ( FlashDwnLdStartMsgProc = 0x40008820 );
|
||||
PROVIDE ( FlashDwnLdStopDeflatedReqMsgProc = 0x40008c18 );
|
||||
PROVIDE ( FlashDwnLdStopReqMsgProc = 0x400088ec );
|
||||
PROVIDE ( __floatdidf = 0x4000c988 );
|
||||
PROVIDE ( __floatdisf = 0x4000c8c0 );
|
||||
PROVIDE ( __floatsidf = 0x4000c944 );
|
||||
@ -248,7 +177,6 @@ PROVIDE ( _fwalk = 0x4000c738 );
|
||||
PROVIDE ( _fwalk_reent = 0x4000c770 );
|
||||
PROVIDE ( __gcc_bcmp = 0x40064a70 );
|
||||
PROVIDE ( __gedf2 = 0x40063768 );
|
||||
PROVIDE ( _GeneralException = 0x40000e14 );
|
||||
PROVIDE ( __gesf2 = 0x4006340c );
|
||||
PROVIDE ( __get_current_time_locale = 0x40001834 );
|
||||
PROVIDE ( _getenv_r = 0x40001fbc );
|
||||
@ -256,7 +184,6 @@ PROVIDE ( _getpid_r = 0x4000bcfc );
|
||||
PROVIDE ( __getreent = 0x4000be8c );
|
||||
PROVIDE ( _gettimeofday_r = 0x4000bc58 );
|
||||
PROVIDE ( __gettzinfo = 0x40001fcc );
|
||||
PROVIDE ( GetUartDevice = 0x40009598 );
|
||||
PROVIDE ( GF_Jacobian_Point_Addition256 = 0x400163a4 );
|
||||
PROVIDE ( GF_Jacobian_Point_Double256 = 0x40016260 );
|
||||
PROVIDE ( GF_Point_Jacobian_To_Affine256 = 0x40016b0c );
|
||||
@ -265,31 +192,6 @@ PROVIDE ( gmtime = 0x40059848 );
|
||||
PROVIDE ( gmtime_r = 0x40059868 );
|
||||
PROVIDE ( g_phyFuns_instance = 0x3ffae0c4 );
|
||||
PROVIDE ( g_rom_flashchip = 0x3ffae270 );
|
||||
PROVIDE ( gpio_init = 0x40009c20 );
|
||||
PROVIDE ( gpio_input_get = 0x40009b88 );
|
||||
PROVIDE ( gpio_input_get_high = 0x40009b9c );
|
||||
PROVIDE ( gpio_intr_ack = 0x40009dd4 );
|
||||
PROVIDE ( gpio_intr_ack_high = 0x40009e1c );
|
||||
PROVIDE ( gpio_intr_handler_register = 0x40009e6c );
|
||||
PROVIDE ( gpio_intr_pending = 0x40009cec );
|
||||
PROVIDE ( gpio_intr_pending_high = 0x40009cf8 );
|
||||
PROVIDE ( gpio_matrix_in = 0x40009edc );
|
||||
PROVIDE ( gpio_matrix_out = 0x40009f0c );
|
||||
PROVIDE ( gpio_output_set = 0x40009b24 );
|
||||
PROVIDE ( gpio_output_set_high = 0x40009b5c );
|
||||
PROVIDE ( gpio_pad_hold = 0x4000a734 );
|
||||
PROVIDE ( gpio_pad_pulldown = 0x4000a348 );
|
||||
PROVIDE ( gpio_pad_pullup = 0x4000a22c );
|
||||
PROVIDE ( gpio_pad_select_gpio = 0x40009fdc );
|
||||
PROVIDE ( gpio_pad_set_drv = 0x4000a11c );
|
||||
PROVIDE ( gpio_pad_unhold = 0x4000a484 );
|
||||
PROVIDE ( gpio_pending_mask = 0x3ffe0038 );
|
||||
PROVIDE ( gpio_pending_mask_high = 0x3ffe0044 );
|
||||
PROVIDE ( gpio_pin_intr_state_set = 0x40009d04 );
|
||||
PROVIDE ( gpio_pin_wakeup_disable = 0x40009eb0 );
|
||||
PROVIDE ( gpio_pin_wakeup_enable = 0x40009e7c );
|
||||
PROVIDE ( gpio_register_get = 0x40009cbc );
|
||||
PROVIDE ( gpio_register_set = 0x40009bbc );
|
||||
PROVIDE ( __gtdf2 = 0x400636dc );
|
||||
PROVIDE ( __gtsf2 = 0x400633a0 );
|
||||
PROVIDE ( gTxMsg = 0x3ffe0050 );
|
||||
@ -314,7 +216,6 @@ PROVIDE ( hmac_sha1 = 0x40060acc );
|
||||
PROVIDE ( hmac_sha1_vector = 0x400609e4 );
|
||||
PROVIDE ( hmac_sha256 = 0x40060d58 );
|
||||
PROVIDE ( hmac_sha256_vector = 0x40060c84 );
|
||||
PROVIDE ( intr_matrix_set = 0x4000681c );
|
||||
PROVIDE ( isalnum = 0x40000f04 );
|
||||
PROVIDE ( isalpha = 0x40000f18 );
|
||||
PROVIDE ( isascii = 0x4000c20c );
|
||||
@ -333,7 +234,6 @@ PROVIDE ( __itoa = 0x40056678 );
|
||||
PROVIDE ( jd_decomp = 0x400613e8 );
|
||||
PROVIDE ( jd_prepare = 0x40060fa8 );
|
||||
PROVIDE ( ke_env = 0x3ffb93cc );
|
||||
PROVIDE ( _KernelExceptionVector = 0x40000300 );
|
||||
PROVIDE ( _kill_r = 0x4000bd10 );
|
||||
PROVIDE ( labs = 0x40056370 );
|
||||
PROVIDE ( lb_default_handler = 0x3ff982b8 );
|
||||
@ -357,15 +257,6 @@ PROVIDE ( ld_sched_params = 0x3ffb96c0 );
|
||||
PROVIDE ( ld_sync_train_channels = 0x3ff98a3c );
|
||||
PROVIDE ( __ledf2 = 0x40063704 );
|
||||
PROVIDE ( __lesf2 = 0x400633c0 );
|
||||
PROVIDE ( _Level2FromVector = 0x40000954 );
|
||||
PROVIDE ( _Level2Vector = 0x40000180 );
|
||||
PROVIDE ( _Level3FromVector = 0x40000a28 );
|
||||
PROVIDE ( _Level3Vector = 0x400001c0 );
|
||||
PROVIDE ( _Level4FromVector = 0x40000af8 );
|
||||
PROVIDE ( _Level4Vector = 0x40000200 );
|
||||
PROVIDE ( _Level5FromVector = 0x40000c68 );
|
||||
PROVIDE ( _Level5Vector = 0x40000240 );
|
||||
PROVIDE ( _LevelOneInterrupt = 0x40000835 );
|
||||
PROVIDE ( _link_r = 0x4000bc9c );
|
||||
PROVIDE ( llc_default_handler = 0x3ff98b3c );
|
||||
PROVIDE ( llc_default_state_tab_p_get = 0x40046058 );
|
||||
@ -436,10 +327,7 @@ PROVIDE ( memccpy = 0x4000c220 );
|
||||
PROVIDE ( memchr = 0x4000c244 );
|
||||
PROVIDE ( memcmp = 0x4000c260 );
|
||||
PROVIDE ( memcpy = 0x4000c2c8 );
|
||||
PROVIDE ( MemDwnLdStartMsgProc = 0x40008948 );
|
||||
PROVIDE ( MemDwnLdStopReqMsgProc = 0x400089dc );
|
||||
PROVIDE ( memmove = 0x4000c3c0 );
|
||||
PROVIDE ( MemPacketSendReqMsgProc = 0x40008978 );
|
||||
PROVIDE ( memrchr = 0x4000c400 );
|
||||
PROVIDE ( memset = 0x4000c44c );
|
||||
PROVIDE ( mktime = 0x4005a5e8 );
|
||||
@ -469,7 +357,6 @@ PROVIDE ( __negsf2 = 0x400020c0 );
|
||||
PROVIDE ( __negvdi2 = 0x40002e98 );
|
||||
PROVIDE ( __negvsi2 = 0x40002e78 );
|
||||
PROVIDE ( __nesf2 = 0x40063374 );
|
||||
PROVIDE ( _NMIExceptionVector = 0x400002c0 );
|
||||
PROVIDE ( notEqual256 = 0x40015b04 );
|
||||
PROVIDE ( __nsau_data = 0x3ff96544 );
|
||||
PROVIDE ( one_bits = 0x3ff971f8 );
|
||||
@ -521,7 +408,6 @@ PROVIDE ( r_co_list_push_front = 0x40013ff4 );
|
||||
PROVIDE ( r_co_list_size = 0x400142ac );
|
||||
PROVIDE ( r_co_nb_good_channels = 0x40014360 );
|
||||
PROVIDE ( r_co_slot_to_duration = 0x40014348 );
|
||||
PROVIDE ( RcvMsg = 0x4000954c );
|
||||
PROVIDE ( r_dbg_init = 0x40014394 );
|
||||
PROVIDE ( r_dbg_platform_reset_complete = 0x400143d0 );
|
||||
PROVIDE ( r_dbg_swdiag_init = 0x40014470 );
|
||||
@ -560,15 +446,12 @@ PROVIDE ( r_ecc_gen_new_secret_key = 0x400170e4 );
|
||||
PROVIDE ( r_ecc_get_debug_Keys = 0x40017224 );
|
||||
PROVIDE ( r_ecc_init = 0x40016dbc );
|
||||
PROVIDE ( RecvBuff = 0x3ffe009c );
|
||||
PROVIDE ( recv_packet = 0x40009424 );
|
||||
PROVIDE ( r_em_buf_init = 0x4001729c );
|
||||
PROVIDE ( r_em_buf_rx_buff_addr_get = 0x400173e8 );
|
||||
PROVIDE ( r_em_buf_rx_free = 0x400173c4 );
|
||||
PROVIDE ( r_em_buf_tx_buff_addr_get = 0x40017404 );
|
||||
PROVIDE ( r_em_buf_tx_free = 0x4001741c );
|
||||
PROVIDE ( _rename_r = 0x4000bc28 );
|
||||
PROVIDE ( _ResetHandler = 0x40000450 );
|
||||
PROVIDE ( _ResetVector = 0x40000400 );
|
||||
PROVIDE ( r_F1_256 = 0x400133e4 );
|
||||
PROVIDE ( r_F2_256 = 0x40013568 );
|
||||
PROVIDE ( r_F3_256 = 0x40013664 );
|
||||
@ -1351,7 +1234,6 @@ PROVIDE ( rom_iq_est_disable = 0x40005590 );
|
||||
PROVIDE ( rom_iq_est_enable = 0x40005514 );
|
||||
PROVIDE ( rom_linear_to_db = 0x40005f64 );
|
||||
PROVIDE ( rom_loopback_mode_en = 0x400030f8 );
|
||||
PROVIDE ( rom_main = 0x400076c4 );
|
||||
PROVIDE ( rom_meas_tone_pwr_db = 0x40006004 );
|
||||
PROVIDE ( rom_mhz2ieee = 0x4000404c );
|
||||
PROVIDE ( rom_noise_floor_auto_set = 0x40003bdc );
|
||||
@ -1458,10 +1340,6 @@ PROVIDE ( r_rwip_wakeup_delay_set = 0x40055e4c );
|
||||
PROVIDE ( r_rwip_wakeup_end = 0x40055e18 );
|
||||
PROVIDE ( r_rwip_wlcoex_set = 0x40055f60 );
|
||||
PROVIDE ( r_SHA_256 = 0x40013a90 );
|
||||
PROVIDE ( rtc_boot_control = 0x4000821c );
|
||||
PROVIDE ( rtc_get_reset_reason = 0x400081d4 );
|
||||
PROVIDE ( rtc_get_wakeup_cause = 0x400081f4 );
|
||||
PROVIDE ( rtc_select_apb_bridge = 0x40008288 );
|
||||
PROVIDE ( rwip_coex_cfg = 0x3ff9914c );
|
||||
PROVIDE ( rwip_priority = 0x3ff99159 );
|
||||
PROVIDE ( rwip_rf = 0x3ffbdb28 );
|
||||
@ -1473,13 +1351,10 @@ PROVIDE ( __sccl = 0x4000c498 );
|
||||
PROVIDE ( __sclose = 0x400011b8 );
|
||||
PROVIDE ( SelectSpiFunction = 0x40061f84 );
|
||||
PROVIDE ( SelectSpiQIO = 0x40061ddc );
|
||||
PROVIDE ( SendMsg = 0x40009384 );
|
||||
PROVIDE ( send_packet = 0x40009340 );
|
||||
PROVIDE ( __seofread = 0x40001148 );
|
||||
PROVIDE ( setjmp = 0x40056268 );
|
||||
PROVIDE ( setlocale = 0x40059568 );
|
||||
PROVIDE ( _setlocale_r = 0x4005950c );
|
||||
PROVIDE ( set_rtc_memory_crc = 0x40008208 );
|
||||
PROVIDE ( SetSpiDrvs = 0x40061e78 );
|
||||
PROVIDE ( __sf_fake_stderr = 0x3ff96458 );
|
||||
PROVIDE ( __sf_fake_stdin = 0x3ff96498 );
|
||||
@ -1528,8 +1403,6 @@ PROVIDE ( slc_send_to_host_chain = 0x4000b6a0 );
|
||||
PROVIDE ( slc_set_host_io_max_window = 0x4000b89c );
|
||||
PROVIDE ( slc_to_host_chain_recycle = 0x4000b758 );
|
||||
PROVIDE ( __smakebuf_r = 0x40059108 );
|
||||
PROVIDE ( software_reset = 0x4000824c );
|
||||
PROVIDE ( software_reset_cpu = 0x40008264 );
|
||||
PROVIDE ( specialModP256 = 0x4001600c );
|
||||
PROVIDE ( spi_cache_sram_init = 0x400626e4 );
|
||||
PROVIDE ( SPIClkConfig = 0x40062bc8 );
|
||||
@ -1629,7 +1502,6 @@ PROVIDE ( __swbuf_r = 0x40058bec );
|
||||
PROVIDE ( __swrite = 0x40001150 );
|
||||
PROVIDE ( __swsetup_r = 0x40058cc8 );
|
||||
PROVIDE ( sw_to_hw = 0x3ffb8d40 );
|
||||
PROVIDE ( _SyscallException = 0x400007cf );
|
||||
PROVIDE ( syscall_table_ptr_app = 0x3ffae020 );
|
||||
PROVIDE ( syscall_table_ptr_pro = 0x3ffae024 );
|
||||
PROVIDE ( _system_r = 0x4000bc10 );
|
||||
@ -1660,31 +1532,7 @@ PROVIDE ( _tzname = 0x3ffae030 );
|
||||
PROVIDE ( tzset = 0x40001a1c );
|
||||
PROVIDE ( _tzset_r = 0x40001a28 );
|
||||
PROVIDE ( __tz_unlock = 0x40001a10 );
|
||||
PROVIDE ( uartAttach = 0x40008fd0 );
|
||||
PROVIDE ( uart_baudrate_detect = 0x40009034 );
|
||||
PROVIDE ( uart_buff_switch = 0x400093c0 );
|
||||
PROVIDE ( UartConnCheck = 0x40008738 );
|
||||
PROVIDE ( UartConnectProc = 0x40008a04 );
|
||||
PROVIDE ( UartDev = 0x3ffe019c );
|
||||
PROVIDE ( uart_div_modify = 0x400090cc );
|
||||
PROVIDE ( UartDwnLdProc = 0x40008ce8 );
|
||||
PROVIDE ( UartGetCmdLn = 0x40009564 );
|
||||
PROVIDE ( Uart_Init = 0x40009120 );
|
||||
PROVIDE ( UartRegReadProc = 0x40008a58 );
|
||||
PROVIDE ( UartRegWriteProc = 0x40008a14 );
|
||||
PROVIDE ( uart_rx_intr_handler = 0x40008f4c );
|
||||
PROVIDE ( uart_rx_one_char = 0x400092d0 );
|
||||
PROVIDE ( uart_rx_one_char_block = 0x400092a4 );
|
||||
PROVIDE ( uart_rx_readbuff = 0x40009394 );
|
||||
PROVIDE ( UartRxString = 0x400092fc );
|
||||
PROVIDE ( UartSetBaudProc = 0x40008aac );
|
||||
PROVIDE ( UartSpiAttachProc = 0x40008a6c );
|
||||
PROVIDE ( UartSpiReadProc = 0x40008a80 );
|
||||
PROVIDE ( uart_tx_flush = 0x40009258 );
|
||||
PROVIDE ( uart_tx_one_char = 0x40009200 );
|
||||
PROVIDE ( uart_tx_one_char2 = 0x4000922c );
|
||||
PROVIDE ( uart_tx_switch = 0x40009028 );
|
||||
PROVIDE ( uart_tx_wait_idle = 0x40009278 );
|
||||
PROVIDE ( __ucmpdi2 = 0x40063840 );
|
||||
PROVIDE ( __udivdi3 = 0x4000cff8 );
|
||||
PROVIDE ( __udivmoddi4 = 0x40064ab0 );
|
||||
@ -1699,21 +1547,13 @@ PROVIDE ( _unlink_r = 0x4000bc84 );
|
||||
PROVIDE ( __unorddf2 = 0x400637f4 );
|
||||
PROVIDE ( __unordsf2 = 0x40063478 );
|
||||
PROVIDE ( user_code_start = 0x3ffe0400 );
|
||||
PROVIDE ( _UserExceptionVector = 0x40000340 );
|
||||
PROVIDE ( utoa = 0x40056258 );
|
||||
PROVIDE ( __utoa = 0x400561f0 );
|
||||
PROVIDE ( VerifyFlashMd5Proc = 0x40008c44 );
|
||||
PROVIDE ( veryBigHexP256 = 0x3ff9736c );
|
||||
PROVIDE ( wcrtomb = 0x40058920 );
|
||||
PROVIDE ( _wcrtomb_r = 0x400588d8 );
|
||||
PROVIDE ( __wctomb = 0x3ff96540 );
|
||||
PROVIDE ( _wctomb_r = 0x40058f14 );
|
||||
PROVIDE ( _WindowOverflow12 = 0x40000100 );
|
||||
PROVIDE ( _WindowOverflow4 = 0x40000000 );
|
||||
PROVIDE ( _WindowOverflow8 = 0x40000080 );
|
||||
PROVIDE ( _WindowUnderflow12 = 0x40000140 );
|
||||
PROVIDE ( _WindowUnderflow4 = 0x40000040 );
|
||||
PROVIDE ( _WindowUnderflow8 = 0x400000c0 );
|
||||
PROVIDE ( write = 0x4000181c );
|
||||
PROVIDE ( _write_r = 0x4000bd70 );
|
||||
PROVIDE ( xthal_bcopy = 0x4000c098 );
|
||||
@ -1729,12 +1569,38 @@ PROVIDE ( xthal_set_intclear = 0x4000c1ec );
|
||||
PROVIDE ( _xtos_set_intlevel = 0x4000bfdc );
|
||||
PROVIDE ( g_ticks_per_us_pro = 0x3ffe01e0 );
|
||||
PROVIDE ( g_ticks_per_us_app = 0x3ffe40f0 );
|
||||
|
||||
/*
|
||||
These functions are xtos-related (or call xtos-related functions) and do not play well
|
||||
with multicore FreeRTOS. Where needed, we provide alternatives that are multicore
|
||||
compatible.
|
||||
compatible. These functions also use a chunk of static RAM, by not using them we can
|
||||
allocate that RAM for general use.
|
||||
*/
|
||||
/*
|
||||
PROVIDE ( _DebugExceptionVector = 0x40000280 );
|
||||
PROVIDE ( _DoubleExceptionVector = 0x400003c0 );
|
||||
PROVIDE ( _KernelExceptionVector = 0x40000300 );
|
||||
PROVIDE ( _GeneralException = 0x40000e14 );
|
||||
PROVIDE ( _ResetHandler = 0x40000450 );
|
||||
PROVIDE ( _ResetVector = 0x40000400 );
|
||||
PROVIDE ( _UserExceptionVector = 0x40000340 );
|
||||
PROVIDE ( _NMIExceptionVector = 0x400002c0 );
|
||||
PROVIDE ( _WindowOverflow12 = 0x40000100 );
|
||||
PROVIDE ( _WindowOverflow4 = 0x40000000 );
|
||||
PROVIDE ( _WindowOverflow8 = 0x40000080 );
|
||||
PROVIDE ( _WindowUnderflow12 = 0x40000140 );
|
||||
PROVIDE ( _WindowUnderflow4 = 0x40000040 );
|
||||
PROVIDE ( _WindowUnderflow8 = 0x400000c0 );
|
||||
PROVIDE ( _Level2FromVector = 0x40000954 );
|
||||
PROVIDE ( _Level3FromVector = 0x40000a28 );
|
||||
PROVIDE ( _Level4FromVector = 0x40000af8 );
|
||||
PROVIDE ( _Level5FromVector = 0x40000c68 );
|
||||
PROVIDE ( _Level2Vector = 0x40000180 );
|
||||
PROVIDE ( _Level3Vector = 0x400001c0 );
|
||||
PROVIDE ( _Level4Vector = 0x40000200 );
|
||||
PROVIDE ( _Level5Vector = 0x40000240 );
|
||||
PROVIDE ( _LevelOneInterrupt = 0x40000835 );
|
||||
PROVIDE ( _SyscallException = 0x400007cf );
|
||||
PROVIDE ( _xtos_alloca_handler = 0x40000010 );
|
||||
PROVIDE ( _xtos_cause3_handler = 0x40000dd8 );
|
||||
PROVIDE ( _xtos_c_handler_table = 0x3ffe0548 );
|
||||
@ -1760,12 +1626,164 @@ PROVIDE ( _xtos_unhandled_exception = 0x4000c024 );
|
||||
PROVIDE ( _xtos_unhandled_interrupt = 0x4000c01c );
|
||||
PROVIDE ( _xtos_vpri_enabled = 0x3ffe0654 );
|
||||
PROVIDE ( ets_intr_count = 0x3ffe03fc );
|
||||
*/
|
||||
|
||||
/* These functions are part of the UART downloader but also contain general UART functions. */
|
||||
PROVIDE ( FilePacketSendDeflatedReqMsgProc = 0x40008b24 );
|
||||
PROVIDE ( FilePacketSendReqMsgProc = 0x40008860 );
|
||||
PROVIDE ( FlashDwnLdDeflatedStartMsgProc = 0x40008ad8 );
|
||||
PROVIDE ( FlashDwnLdParamCfgMsgProc = 0x4000891c );
|
||||
PROVIDE ( FlashDwnLdStartMsgProc = 0x40008820 );
|
||||
PROVIDE ( FlashDwnLdStopDeflatedReqMsgProc = 0x40008c18 );
|
||||
PROVIDE ( FlashDwnLdStopReqMsgProc = 0x400088ec );
|
||||
PROVIDE ( MemDwnLdStartMsgProc = 0x40008948 );
|
||||
PROVIDE ( MemDwnLdStopReqMsgProc = 0x400089dc );
|
||||
PROVIDE ( MemPacketSendReqMsgProc = 0x40008978 );
|
||||
PROVIDE ( uart_baudrate_detect = 0x40009034 );
|
||||
PROVIDE ( uart_buff_switch = 0x400093c0 );
|
||||
PROVIDE ( UartConnCheck = 0x40008738 );
|
||||
PROVIDE ( UartConnectProc = 0x40008a04 );
|
||||
PROVIDE ( UartDwnLdProc = 0x40008ce8 );
|
||||
PROVIDE ( UartRegReadProc = 0x40008a58 );
|
||||
PROVIDE ( UartRegWriteProc = 0x40008a14 );
|
||||
PROVIDE ( UartSetBaudProc = 0x40008aac );
|
||||
PROVIDE ( UartSpiAttachProc = 0x40008a6c );
|
||||
PROVIDE ( UartSpiReadProc = 0x40008a80 );
|
||||
PROVIDE ( VerifyFlashMd5Proc = 0x40008c44 );
|
||||
PROVIDE ( GetUartDevice = 0x40009598 );
|
||||
PROVIDE ( RcvMsg = 0x4000954c );
|
||||
PROVIDE ( SendMsg = 0x40009384 );
|
||||
PROVIDE ( UartGetCmdLn = 0x40009564 );
|
||||
PROVIDE ( UartRxString = 0x400092fc );
|
||||
PROVIDE ( Uart_Init = 0x40009120 );
|
||||
PROVIDE ( recv_packet = 0x40009424 );
|
||||
PROVIDE ( send_packet = 0x40009340 );
|
||||
PROVIDE ( uartAttach = 0x40008fd0 );
|
||||
PROVIDE ( uart_div_modify = 0x400090cc );
|
||||
PROVIDE ( uart_rx_intr_handler = 0x40008f4c );
|
||||
PROVIDE ( uart_rx_one_char = 0x400092d0 );
|
||||
PROVIDE ( uart_rx_one_char_block = 0x400092a4 );
|
||||
PROVIDE ( uart_rx_readbuff = 0x40009394 );
|
||||
PROVIDE ( uart_tx_flush = 0x40009258 );
|
||||
PROVIDE ( uart_tx_one_char = 0x40009200 );
|
||||
PROVIDE ( uart_tx_one_char2 = 0x4000922c );
|
||||
PROVIDE ( uart_tx_switch = 0x40009028 );
|
||||
PROVIDE ( uart_tx_wait_idle = 0x40009278 );
|
||||
|
||||
|
||||
/*
|
||||
These functions are part of the ROM GPIO driver. We do not use them; the provided esp-idf functions
|
||||
replace them and this way we can re-use the fixed RAM addresses these routines need.
|
||||
*/
|
||||
/* <-- So you don't read over it: This comment disables the next lines.
|
||||
PROVIDE ( gpio_init = 0x40009c20 );
|
||||
PROVIDE ( gpio_intr_ack = 0x40009dd4 );
|
||||
PROVIDE ( gpio_intr_ack_high = 0x40009e1c );
|
||||
PROVIDE ( gpio_intr_handler_register = 0x40009e6c );
|
||||
PROVIDE ( gpio_intr_pending = 0x40009cec );
|
||||
PROVIDE ( gpio_intr_pending_high = 0x40009cf8 );
|
||||
PROVIDE ( gpio_pending_mask = 0x3ffe0038 );
|
||||
PROVIDE ( gpio_pending_mask_high = 0x3ffe0044 );
|
||||
PROVIDE ( gpio_pin_intr_state_set = 0x40009d04 );
|
||||
PROVIDE ( gpio_pin_wakeup_disable = 0x40009eb0 );
|
||||
PROVIDE ( gpio_pin_wakeup_enable = 0x40009e7c );
|
||||
PROVIDE ( gpio_register_get = 0x40009cbc );
|
||||
PROVIDE ( gpio_register_set = 0x40009bbc );
|
||||
*/
|
||||
/* These are still part of that driver, but have been verified not to use static RAM, so they can be used. */
|
||||
PROVIDE ( gpio_output_set = 0x40009b24 );
|
||||
PROVIDE ( gpio_output_set_high = 0x40009b5c );
|
||||
PROVIDE ( gpio_input_get = 0x40009b88 );
|
||||
PROVIDE ( gpio_input_get_high = 0x40009b9c );
|
||||
PROVIDE ( gpio_matrix_in = 0x40009edc );
|
||||
PROVIDE ( gpio_matrix_out = 0x40009f0c );
|
||||
PROVIDE ( gpio_pad_select_gpio = 0x40009fdc );
|
||||
PROVIDE ( gpio_pad_set_drv = 0x4000a11c );
|
||||
PROVIDE ( gpio_pad_pulldown = 0x4000a348 );
|
||||
PROVIDE ( gpio_pad_pullup = 0x4000a22c );
|
||||
PROVIDE ( gpio_pad_hold = 0x4000a734 );
|
||||
PROVIDE ( gpio_pad_unhold = 0x4000a484 );
|
||||
|
||||
/*
|
||||
These functions are part of the non-os kernel (etsc).
|
||||
*/
|
||||
PROVIDE ( ets_aes_crypt = 0x4005c9b8 );
|
||||
PROVIDE ( ets_aes_disable = 0x4005c8f8 );
|
||||
PROVIDE ( ets_aes_enable = 0x4005c8cc );
|
||||
PROVIDE ( ets_aes_set_endian = 0x4005c928 );
|
||||
PROVIDE ( ets_aes_setkey_dec = 0x4005c994 );
|
||||
PROVIDE ( ets_aes_setkey_enc = 0x4005c97c );
|
||||
PROVIDE ( ets_bigint_disable = 0x4005c4e0 );
|
||||
PROVIDE ( ets_bigint_enable = 0x4005c498 );
|
||||
PROVIDE ( ets_bigint_mod_mult_getz = 0x4005c818 );
|
||||
PROVIDE ( ets_bigint_mod_mult_prepare = 0x4005c7b4 );
|
||||
PROVIDE ( ets_bigint_mod_power_getz = 0x4005c614 );
|
||||
PROVIDE ( ets_bigint_mod_power_prepare = 0x4005c54c );
|
||||
PROVIDE ( ets_bigint_montgomery_mult_getz = 0x4005c7a4 );
|
||||
PROVIDE ( ets_bigint_montgomery_mult_prepare = 0x4005c6fc );
|
||||
PROVIDE ( ets_bigint_mult_getz = 0x4005c6e8 );
|
||||
PROVIDE ( ets_bigint_mult_prepare = 0x4005c630 );
|
||||
PROVIDE ( ets_bigint_wait_finish = 0x4005c520 );
|
||||
PROVIDE ( ets_post = 0x4000673c );
|
||||
PROVIDE ( ets_run = 0x400066bc );
|
||||
PROVIDE ( ets_set_idle_cb = 0x40006674 );
|
||||
PROVIDE ( ets_task = 0x40006688 );
|
||||
PROVIDE ( ets_efuse_get_8M_clock = 0x40008710 );
|
||||
PROVIDE ( ets_efuse_get_spiconfig = 0x40008658 );
|
||||
PROVIDE ( ets_efuse_program_op = 0x40008628 );
|
||||
PROVIDE ( ets_efuse_read_op = 0x40008600 );
|
||||
PROVIDE ( ets_intr_lock = 0x400067b0 );
|
||||
PROVIDE ( ets_intr_unlock = 0x400067c4 );
|
||||
PROVIDE ( ets_isr_attach = 0x400067ec );
|
||||
PROVIDE ( ets_isr_mask = 0x400067fc );
|
||||
PROVIDE ( ets_isr_unmask = 0x40006808 );
|
||||
*/
|
||||
PROVIDE ( ets_waiti0 = 0x400067d8 );
|
||||
PROVIDE ( intr_matrix_set = 0x4000681c );
|
||||
PROVIDE ( check_pos = 0x400068b8 );
|
||||
PROVIDE ( ets_set_appcpu_boot_addr = 0x4000689c );
|
||||
PROVIDE ( ets_set_startup_callback = 0x4000688c );
|
||||
PROVIDE ( ets_set_user_start = 0x4000687c );
|
||||
PROVIDE ( ets_unpack_flash_code = 0x40007018 );
|
||||
PROVIDE ( ets_unpack_flash_code_legacy = 0x4000694c );
|
||||
PROVIDE ( rom_main = 0x400076c4 );
|
||||
PROVIDE ( ets_install_putc1 = 0x40007d18 );
|
||||
PROVIDE ( ets_install_putc2 = 0x40007d38 );
|
||||
PROVIDE ( ets_install_uart_printf = 0x40007d28 );
|
||||
PROVIDE ( ets_printf = 0x40007d54 );
|
||||
PROVIDE ( rtc_boot_control = 0x4000821c );
|
||||
PROVIDE ( rtc_get_reset_reason = 0x400081d4 );
|
||||
PROVIDE ( rtc_get_wakeup_cause = 0x400081f4 );
|
||||
PROVIDE ( rtc_select_apb_bridge = 0x40008288 );
|
||||
PROVIDE ( set_rtc_memory_crc = 0x40008208 );
|
||||
PROVIDE ( software_reset = 0x4000824c );
|
||||
PROVIDE ( software_reset_cpu = 0x40008264 );
|
||||
PROVIDE ( ets_secure_boot_check = 0x4005cb40 );
|
||||
PROVIDE ( ets_secure_boot_check_finish = 0x4005cc04 );
|
||||
PROVIDE ( ets_secure_boot_check_start = 0x4005cbcc );
|
||||
PROVIDE ( ets_secure_boot_finish = 0x4005ca84 );
|
||||
PROVIDE ( ets_secure_boot_hash = 0x4005cad4 );
|
||||
PROVIDE ( ets_secure_boot_obtain = 0x4005cb14 );
|
||||
PROVIDE ( ets_secure_boot_rd_abstract = 0x4005cba8 );
|
||||
PROVIDE ( ets_secure_boot_rd_iv = 0x4005cb84 );
|
||||
PROVIDE ( ets_secure_boot_start = 0x4005ca34 );
|
||||
PROVIDE ( ets_sha_disable = 0x4005c0a8 );
|
||||
PROVIDE ( ets_sha_enable = 0x4005c07c );
|
||||
PROVIDE ( ets_sha_finish = 0x4005c104 );
|
||||
PROVIDE ( ets_sha_init = 0x4005c0d4 );
|
||||
PROVIDE ( ets_sha_update = 0x4005c2a0 );
|
||||
PROVIDE ( ets_delay_us = 0x40008534 );
|
||||
PROVIDE ( ets_get_cpu_frequency = 0x4000855c );
|
||||
PROVIDE ( ets_get_detected_xtal_freq = 0x40008588 );
|
||||
PROVIDE ( ets_get_xtal_scale = 0x4000856c );
|
||||
PROVIDE ( ets_timer_arm = 0x40008368 );
|
||||
PROVIDE ( ets_timer_arm_us = 0x400083ac );
|
||||
PROVIDE ( ets_timer_disarm = 0x400083ec );
|
||||
PROVIDE ( ets_timer_done = 0x40008428 );
|
||||
PROVIDE ( ets_timer_handler_isr = 0x40008454 );
|
||||
PROVIDE ( ets_timer_init = 0x400084e8 );
|
||||
PROVIDE ( ets_timer_setfn = 0x40008350 );
|
||||
PROVIDE ( ets_update_cpu_frequency_rom = 0x40008550 ); /* Updates g_ticks_per_us on the current CPU only; not on the other core */
|
||||
|
||||
/* Following are static data, but can be used, not generated by script <<<<< btdm data */
|
||||
PROVIDE ( ld_acl_env = 0x3ffb8258 );
|
||||
PROVIDE ( ld_active_ch_map = 0x3ffb8334 );
|
||||
@ -1785,3 +1803,4 @@ PROVIDE ( ld_sco_env = 0x3ffb824c );
|
||||
PROVIDE ( ld_sscan_env = 0x3ffb832c );
|
||||
PROVIDE ( ld_strain_env = 0x3ffb8330 );
|
||||
/* Above are static data, but can be used, not generated by script >>>>> btdm data */
|
||||
|
||||
|
||||
49
components/freertos/test/test_malloc.c
Normal file
49
components/freertos/test/test_malloc.c
Normal file
@ -0,0 +1,49 @@
|
||||
/*
|
||||
Generic test for malloc/free
|
||||
*/
|
||||
|
||||
#include <esp_types.h>
|
||||
#include <stdio.h>
|
||||
#include "rom/ets_sys.h"
|
||||
|
||||
#include "freertos/FreeRTOS.h"
|
||||
#include "freertos/task.h"
|
||||
#include "freertos/semphr.h"
|
||||
#include "freertos/queue.h"
|
||||
#include "freertos/xtensa_api.h"
|
||||
#include "unity.h"
|
||||
#include "soc/uart_reg.h"
|
||||
#include "soc/dport_reg.h"
|
||||
#include "soc/io_mux_reg.h"
|
||||
|
||||
static int tryAllocMem() {
|
||||
int **mem;
|
||||
int i, noAllocated, j;
|
||||
mem=malloc(sizeof(int)*1024);
|
||||
if (!mem) return 0;
|
||||
for (i=0; i<1024; i++) {
|
||||
mem[i]=malloc(1024);
|
||||
if (mem[i]==NULL) break;
|
||||
for (j=0; j<1024/4; j++) mem[i][j]=(0xdeadbeef);
|
||||
}
|
||||
noAllocated=i;
|
||||
for (i=0; i<noAllocated; i++) {
|
||||
for (j=0; j<1024/4; j++) {
|
||||
TEST_ASSERT(mem[i][j]==(0xdeadbeef));
|
||||
}
|
||||
free(mem[i]);
|
||||
}
|
||||
free(mem);
|
||||
return noAllocated;
|
||||
}
|
||||
|
||||
|
||||
TEST_CASE("Malloc/overwrite, then free all available DRAM", "[freertos]")
|
||||
{
|
||||
int m1=0, m2=0;
|
||||
m1=tryAllocMem();
|
||||
m2=tryAllocMem();
|
||||
printf("Could allocate %dK on first try, %dK on 2nd try.\n", m1, m2);
|
||||
TEST_ASSERT(m1==m2);
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user