2 Commits

Author	SHA1	Message	Date
Ivan Grokhotkov	cc67500d3e	unit test: adapt tests to single core configuration	2017-10-19 21:35:21 +08:00
Ivan Grokhotkov	8c25a0fd9d	time: workaround for FRC_TIMER_INT_REG write issue ... In some cases (when RTC register reads are performed from the APP CPU), a write to FRC_TIMER_INT_REG may be lost on the bus. Writing to another DPORT register immediately before or after that works around the issue. We write one dummy value to an address which doesn’t have any register associated with it. Fixes https://github.com/espressif/arduino-esp32/issues/120	2017-01-17 12:29:09 +08:00