alex/esp-idf
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32,482 Commits 20 Branches 148 Tags 384 MiB
8e5e95e452
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491 Commits

Author SHA1 Message Date
wuzhenghui
8e5e95e452
change(esp_hw_support): update xtal_freq after assume to avoid mass print in DFS 2024-06-24 13:38:47 +08:00
Marius Vikhammer
bd2b9390ef Merge branch 'refactor/cpu_interrupt_table_v5.1' into 'release/v5.1' 
fix(esp_hw_support): refactor and clear reserved interrupts that are unused or not applicable anymore (backport v5.1)

See merge request espressif/esp-idf!31259
 2024-06-21 08:59:05 +08:00
Li Shuai
f5f020f6e7
fix(esp_hw_support): use iterator for regdma_link_stats to save stack consume 
Closes https://github.com/espressif/esp-idf/issues/13288
 2024-06-17 15:59:07 +08:00
Omar Chebib
16d957e7aa fix(esp_hw_support): clear reserved interrupts that are not applicable for each target 2024-06-03 11:09:45 +08:00
Omar Chebib
1439815d57 refactor(esp_hw_support): changed reserved interrupt functions to be now defined per SoC 2024-06-03 11:05:25 +08:00
Jiang Jiang Jian
cfe861582c Merge branch 'bugfix/stop_tg_wdt_in_xpd_xtal_lightsleep_v5.1' into 'release/v5.1' 
fix(esp_hw_support): stop tg wdt in xpd xtal lightsleep (v5.1)

See merge request espressif/esp-idf!31140
 2024-05-30 20:00:24 +08:00
wuzhenghui
bd1017132e
change(esp_hw_support/sleep): improve esp32c3 systimer stall bug workaround 2024-05-28 19:38:04 +08:00
Li Shuai
c9b1618a3e change(esp_hw_support): dump sleep retention context to io stream 2024-05-14 19:34:37 +08:00
Li Shuai
08a05ec562 change(esp_hw_support): use new retention api to implement gdma retention 2024-05-14 19:34:37 +08:00
Jiang Jiang Jian
a8f833a912 Merge branch 'fix/fix_pmu_power_domain_initialize_order_v5.1' into 'release/v5.1' 
fix(esp_hw_support): fix pmu power domain initialize order (v5.1)

See merge request espressif/esp-idf!30152
 2024-04-10 17:23:55 +08:00
wuzhenghui
ddd2c5b418
fix(esp_hw_support): fix pmu power domain initialize order 2024-04-10 10:07:58 +08:00
Mahavir Jain
d1c17f96f6 Merge branch 'fix/pmp_idcache_prot_c6_h2_v5.1' into 'release/v5.1' 
fix(esp_hw_support): Fix the flash I/DROM region PMP protection (v5.1)

See merge request espressif/esp-idf!30023
 2024-04-08 17:52:23 +08:00
Laukik Hase
f839fa089a
fix(esp_hw_support): Fix the flash I/DROM region PMP protection 2024-04-03 15:51:39 +05:30
Li Shuai
4254953374 fix(esp_hw_support): fixed modem hang caused by incorrect configuration of power and isolate signals 2024-04-03 10:49:31 +08:00
Jiang Jiang Jian
59d686ed3c Merge branch 'bugfix/fix_maximum_value_of_config_rtc_clk_cal_cycles_bug_v5.1' into 'release/v5.1' 
ESP All Chip: fixed the maximum value of config RTC_CLK_CAL_SYCLES bug (v5.1)

See merge request espressif/esp-idf!29649
 2024-03-15 13:44:18 +08:00
hongshuqing
d50b336afd fix: fix_maximum_value_of_config_rtc_clk_cal_cycle_bug 2024-03-14 16:12:17 +08:00
chaijie@espressif.com
9680d3fa81 fix: fix sleep fast_mem & slow_mem may lost bug 2024-03-14 15:03:49 +08:00
Xiao Xufeng
194ea85ee8 spi_flash: fixed issue that enabling HPM-DC by default may cause app unable to restart 2024-03-12 10:48:08 +08:00
Mahavir Jain
590c650fc0 Merge branch 'fix/pmp_idcache_reg_prot_v5.1' into 'release/v5.1' 
fix(esp_hw_support): Fix the I/DCACHE region PMP protection (v5.1)

See merge request espressif/esp-idf!29357
 2024-03-08 22:50:10 +08:00
Jiang Jiang Jian
44fa82c7c3 Merge branch 'feature/support_gdma_retention_v5.1' into 'release/v5.1' 
feature: support gdma retention in pd_top lightsleep (v5.1)

See merge request espressif/esp-idf!29089
 2024-03-05 10:59:30 +08:00
Laukik Hase
5fcd908d26
refactor(esp_hw_support): Remove redundant PMP entry for ROM region 
- The ROM text and data sections share the address range
    (see SOC_I/DROM_MASK_LOW - SOC_I/DROM_MASK_HIGH).
  - Initially, we had two PMP entries for this address range - one marking the
    region as RX and the other as R.
  - However, the latter entry is redundant as the former locks the PMP settings.
  - We can divide the ROM region into text and data sections later when we
    define boundaries marking these regions from the ROM.
 2024-03-01 10:25:25 +05:30
Laukik Hase
5173ba1777
fix(esp_hw_support): Fix the I/DCACHE region PMP protection 2024-03-01 10:25:25 +05:30
Aditya Patwardhan
55c5c8367b Merge branch 'bugfix/soc_cpu_subsys_region_v5.1' into 'release/v5.1' 
fix(soc): change debug addr range to CPU subsystem range (v5.1)

See merge request espressif/esp-idf!28672
 2024-02-28 11:16:48 +08:00
Jiang Jiang Jian
76152c80a2 Merge branch 'c6_auto_dbias_master_hsq_v5.1' into 'release/v5.1' 
ESP32C6: Active & sleep dbg and dbias get from efuse to fix the voltage (v5.1)

See merge request espressif/esp-idf!28722
 2024-02-28 10:49:13 +08:00
wuzhenghui
40a869935b
feat(esp_hw_support): support gdma register context sleep retention 
Closes https://github.com/espressif/esp-idf/issues/12528
 2024-02-23 18:30:17 +08:00
hongshuqing
80378b809e feat(pmu): set fix voltage to different mode for esp32c6 2024-02-22 15:01:14 +08:00
Jakob Hasse
a66234b6de fix(esp_hw_support): Removed unused include directories from cmake 
* Closes https://github.com/espressif/esp-idf/issues/12700
 2024-02-21 11:41:11 +08:00
hongshuqing
9f5cd217a0 feat(pmu): set fix voltage to different mode for esp32h2 
h2 remove include
 2024-01-26 11:39:16 +08:00
Mahavir Jain
614ad494f6
fix(soc): change debug addr range to CPU subsystem range 
For C6/H2/P4/C5, there is no SoC specific debug range. Instead the same
address range is part of CPU Subsystem range which contains debug mode
specific code and interrupt config registers (CLINT, PLIC etc.).

For now the PMP entry is provided with RWX permission for both machine
and user mode but we can save this entry and allow the access to only
machine mode for this range.

For P4/C5 case, this PMP entry can have RW permission as the debug mode
specific code is not present in this memory range.
 2024-01-24 12:52:27 +05:30
Jiang Jiang Jian
aa2793f3f1 Merge branch 'feature/support_hw_trigger_regdma_when_pu_top_v5.1' into 'release/v5.1' 
fix(pm): trigger regdma retention by PMU when TOP is not power down on esp32H2 (backport v5.1)

See merge request espressif/esp-idf!28342
 2024-01-18 11:06:51 +08:00
Lou Tianhao
2ecbfecedf feat(pm): support PMU trigger regdma when PU TOP 2024-01-16 14:01:22 +08:00
Xiao Xufeng
a055fcbda4 fix(rtc): fixed bbpll not calibrated from bootloader issue 2024-01-05 10:19:20 +08:00
chaijie@espressif.com
630a8ff709 fix(bbpll): fix bbpll calibration may stop early bug(ESP32C2/S3/C6/H2) 2024-01-05 03:24:20 +08:00
Michael (XIAO Xufeng)
67043f557f feat(soc): Increase max supported version of C3 to 1.99 2024-01-03 18:02:49 +08:00
wuzhenghui
c33dd0f4a2
fix(esp_hw_support/sleep): wait flash ready after non-pd_top lightsleep for esp32c6 2023-12-27 15:36:15 +08:00
Jiang Jiang Jian
a8a3adcfb8 Merge branch 'bugfix/put_extra_link_retention_in_iram_5.1' into 'release/v5.1' 
fix(pm): place extra link opt in iram(Backport v5.1)

See merge request espressif/esp-idf!27898
 2023-12-21 11:28:38 +08:00
Lou Tianhao
1419db4b91 change(pm): change macro SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG 2023-12-19 11:44:23 +08:00
cjin
7d2ab4c14d fix(pm): place extra link opt in iram 2023-12-14 11:17:54 +08:00
wuzhenghui
5dac3d9e03 fix(esp_hw_support/sleep): fix rtc_time_us_to_slowclk div zero in deepsleep process 
Closes https://github.com/espressif/esp-idf/issues/12695
 2023-12-11 09:24:07 +00:00
Jiang Guang Ming
03582a8cfe fix(esp32c3): Update esp32c3 chip revision 2023-11-27 11:32:50 +00:00
wuzhenghui
61bb3fb67f fix(esp_hw_support): clear all type ULP wakeup intr status at ulp wakeup source enable 2023-11-16 11:49:40 +08:00
Jiang Jiang Jian
cee24a6ce1 Merge branch 'bringup/support_callback_mechanism_in_lightsleep_flow_v5.1' into 'release/v5.1' 
feat(pm): support callback mechanism in lightsleep flow(backport v5.1)

See merge request espressif/esp-idf!26365
 2023-11-14 15:33:19 +08:00
Jiang Jiang Jian
1ed40720d6 Merge branch 'bugfix/lp_active_slow_clock_domain_default_power_down_v5.1' into 'release/v5.1' 
backport v5.1: In the LP ACTIVE state, the slow clock power domain is by default in a powered-off state

See merge request espressif/esp-idf!26601
 2023-11-14 15:09:02 +08:00
Armando
6de9757a4b fix(adc): rename ADC_ATTEN_DB_11 to ADC_ATTEN_DB_12 
By design, it's 12 dB. There're errors among chips, so the actual
attenuation will be 11dB more or less
 2023-11-07 14:09:21 +08:00
Lou Tianhao
925da11115 feat(PowerManagement/lightsleep): Support ESP_SLEEP_EVENT_CALLBACKS 2023-11-02 11:05:38 +00:00
Li Shuai
9d97513147 change(Power Management): the xpd_xtal32k value depends on system slow clock source config option when pmu initialize 2023-10-24 17:15:10 +08:00
zlq
17c2931309 feat(bootloader): adjust dbias of bootloader, change clock of H2 to 64 
MHz
 2023-10-16 14:35:45 +08:00
Xiao Xufeng
81dcc61008 Revert "feat(volt): chip auto adjust volt for esp32c6 & esp32h2" 
This reverts commit b221f87e00.
 2023-10-16 14:35:41 +08:00
gaoxu
0538a7b138 fix(adc): power settings not taking into effect on H2 2023-09-28 16:24:39 +00:00
wuzhenghui
49013a0560 feat(modem_clock): separate management of modem_adc_common_fe clock and modem_private_fe 2023-09-28 16:24:39 +00:00