Eliminate UT_T1_GPIO runner requirement by routing internally through gpio matrix and by setting gpio pins to GPIO_MODE_INPUT_OUTPUT mode for all interrupt related test cases.
By unchecking "Place panic handler code in IRAM" in the menuconfig,
the panic handlers will be placed in flash. Of course, flash cache must
be activated when entering panic handlers.
This commit adds the feature where the TWAI ISR will continue to
run even if the cache is disabled. Whilst cache is disabled, any
received messages will go into the RX queue, and any pending TX
messages in the TX queue will be transmitted. This feature should
be enabled using the CONFIG_TWAI_ISR_IN_IRAM option.
