Commit Graph

17 Commits

Author SHA1 Message Date
Darian Leung
57fd78f5ba freertos: Remove legacy data types
This commit removes the usage of all legacy FreeRTOS data types that
are exposed via configENABLE_BACKWARD_COMPATIBILITY. Legacy types can
still be used by enabling CONFIG_FREERTOS_ENABLE_BACKWARD_COMPATIBILITY.
2022-02-09 23:05:45 +08:00
Martin Vychodil
dd938eb952 System/Security: Memprot API unified (ESP32C3)
Unified Memory protection API for all PMS-aware chips (ESP32C3)

Closes JIRA IDF-3849
2021-12-21 01:50:36 +01:00
Cao Sen Miao
7f0a746e6a move brownout trax cache_int_err to private folder 2021-11-26 18:27:53 +08:00
Mahavir Jain
bdeaeb8d7f esp_system: enable "cache disable but cache accessed" interrupt for ESP32-S3 2021-10-20 15:16:25 +05:30
Zim Kalinowski
584806a78a updated copyright text 2021-10-11 11:38:35 +08:00
Zim Kalinowski
f2b538b9e7 Merge branch 'master' into feature/github-7517 2021-10-09 18:58:27 +08:00
David Cermak
0ee4c235eb panic/memprot: Fix minor const string correction on panic print 2021-09-09 11:46:21 +02:00
boarchuz
ec70bc0523 fix compiler warning with silent panic option 2021-09-04 14:46:26 +10:00
Martin Vychodil
58aed7df98 ESP32S2: No assert()/abort() in Memprot API, use esp_err_t instead
JIRA IDF-3634
2021-08-26 09:20:00 +02:00
Angus Gratton
c22eb769e7 Merge branch 'bugfix/panic_instrprohibited' into 'master'
esp_system: fix instrprohibited panic backtrace regression

See merge request espressif/esp-idf!13023
2021-04-07 05:14:19 +00:00
Renz Bagaporo
75624c5355 esp_system: fix instrprohibited panic backtrace regression
First PC should have been ignored in the case of InstProhibited panic
when printing backtrace.
2021-04-05 22:05:27 +08:00
Angus Gratton
6b57f33858 Merge branch 'refactor/movements_from_target_components' into 'master'
Movement from target components 1

See merge request espressif/esp-idf!12482
2021-04-05 02:37:21 +00:00
Renz Bagaporo
301c48b6b2 esp_system: remove duplicate panic backtrace code 2021-04-01 07:22:57 +00:00
Renz Bagaporo
7d85c42e52 esp32: move brownout and cache err int setup 2021-03-31 19:13:03 +08:00
Martin Vychodil
69096ddce5 Security: ESP32C3 memory protection feature (IRAM0/DRAM0)
Software support for PMS module.
Allows controlled memory access to IRAM (R/W/X) and DRAM0 (R/W)
On/locked by default, configurable in Kconfig (esp_system)

Closes https://jira.espressif.com:8443/browse/IDF-2092
2021-01-27 08:44:03 +01:00
Omar Chebib
c218f669ba panic on RISC-V: Take into account Merge Request comments 2020-12-31 15:46:17 +08:00
Renz Bagaporo
4cc6b5571b esp_system: support riscv panic 2020-11-13 07:49:11 +11:00