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284 Commits

Author SHA1 Message Date
Mahavir Jain
5758b66a9f Merge branch 'ci/fix_test_switch_ota_v5.1' into 'release/v5.1' 
fix(app_update): Fix CI test_switch_ota by increasing deepsleep (v5.1)

See merge request espressif/esp-idf!25465
 2023-08-24 12:16:51 +08:00
Marius Vikhammer
9838675d3b Merge branch 'bugfix/intr_flags_to_level_v5.1' into 'release/v5.1' 
fix(intr_flags_to_level): fix value returned one more than correct value (v5.1)

See merge request espressif/esp-idf!25424
 2023-08-24 08:34:37 +08:00
KonstantinKondrashov
7ac7d43541 fix(app_update): Fix CI test_switch_ota by increasing deepsleep 
It increases the deepsleep time from 2000 to 20000.
2000 is too small for esp32-s3 chip.
 2023-08-22 16:10:49 +08:00
Planck (Lu Zeyu)
e5394440df fix(intr_flags_to_level): fix value returned one more than correct value 2023-08-21 10:08:49 +08:00
Lou Tianhao
5859b83232 docs(pm/sleep): rewrite_all_low_to_any_low_when_not_esp32 2023-08-03 16:46:55 +08:00
Lou Tianhao
badef66538 change(pm/deepsleep): rewrite the option all low as any low for esp32s2, esp32s3, esp32c6 and esp32h2 2023-08-03 16:46:55 +08:00
Lou Tianhao
b27e57db7b feat(pm/deepsleep): Support EXT1 wakeup for esp32h2 deep_sleep 2023-08-03 16:46:55 +08:00
Mahavir Jain
bba66a1566 Merge branch 'fix/esp_ptr_check_sign_compare_v5.1' into 'release/v5.1' 
fix(esp_hw_support): Fix different signed comparison in `esp_ptr_in_drom` (v5.1)

See merge request espressif/esp-idf!24798
 2023-07-14 17:27:54 +08:00
Jiang Jiang Jian
da8b9ad59d Merge branch 'bugfix/esp32c6_eco1_ble_lpclk_main_xtal_v5.1' into 'release/v5.1' 
backport v5.1:  support 40 MHz XTAL as BLE low power clock source of esp32c6 eco1

See merge request espressif/esp-idf!24789
 2023-07-14 16:34:09 +08:00
Laukik Hase
8abdb33072
fix(esp_hw_support): Fix different signed comparison in esp_ptr_in_drom 
- Closes https://github.com/espressif/esp-idf/issues/11653
- Closes https://github.com/espressif/esp-idf/issues/11865
 2023-07-14 10:52:19 +05:30
cjin
5ec30e6fc2 ble : remove extra retention cnt upon deinit temporarily 2023-07-14 11:07:56 +08:00
Li Shuai
ee3452d410 light sleep: enable system clock in PMU HP sleep state when selecting a 40 MHz XTAL as low power clock source of ble 2023-07-14 11:07:41 +08:00
Li Shuai
a98db6dbd3 modem clock: gatable clock interface which can gate or ungate modem clock domain 2023-07-14 11:07:27 +08:00
Li Shuai
958ae62197 power save: fix bcn_timeout and disconnect with error code 201, m f probe req l=0 issue 2023-07-13 17:02:50 +08:00
xiaqilin
aee329de2b ieee802154: change BLE_BB/ieee802154_BB 2023-07-12 14:36:55 +08:00
xiaqilin
2ac7558da2 openthread: add openthread autostart for sleep device 2023-07-12 14:36:41 +08:00
xiaqilin
b4d951fa6a ieee802154: add sleep state 2023-07-12 14:36:21 +08:00
xiaqilin
4f537d3b98 ieee802154: support light sleep 2023-07-12 14:32:28 +08:00
Lou Tianhao
c39a0cc0b5 Power Management: fix REGDMA power issue when TOP domain powered down during light sleep for esp32h2 2023-07-11 12:03:36 +08:00
Lou Tianhao
24486dd069 Power Management: support PAU REGDMA feature for esp32h2 2023-07-11 12:03:13 +08:00
Lou Tianhao
356fa3ab4b Power Management: support DFS and PMU feature for esp32h2 2023-07-11 12:02:39 +08:00
Cao Sen Miao
acc6d99572 temperature_sensor: Add new interface and reference counts so that phy and driver can use together 2023-07-10 11:16:09 +08:00
Michael (XIAO Xufeng)
5c11366e01 Merge branch 'feature/support_adc_calibration_on_c6_v5.1' into 'release/v5.1' 
adc_cali: supported adc calibration on esp32c6 (v5.1)

See merge request espressif/esp-idf!23936
 2023-07-07 18:29:11 +08:00
Island
a8c9665ae2 Merge branch 'ble_dev/support_esp32h2_modem_clock_selection_5.1' into 'release/v5.1' 
ble: support esp32h2 modem clock selection

See merge request espressif/esp-idf!24388
 2023-07-07 16:57:22 +08:00
Jiang Jiang Jian
16ff61b36e Merge branch 'ble_dev/support_ble_light_sleep_using_extra_link_5.1' into 'release/v5.1' 
Ble dev/support ble light sleep using extra link 5.1

See merge request espressif/esp-idf!24192
 2023-07-05 20:32:56 +08:00
laokaiyao
e90a2d50c4 adc_cali: supported channel compensation of adc calibration on esp32c6 2023-07-05 12:48:11 +08:00
Jiang Jiang Jian
b0717c6852 Merge branch 'feature/enable_sleep_reject_for_deep_sleep_v5.1' into 'release/v5.1' 
sleep: enable sleep reject when entering deepsleep (backport v5.1)

See merge request espressif/esp-idf!24440
 2023-07-04 12:16:11 +08:00
Jiang Jiang Jian
159e80246b Merge branch 'feature/add_modem_module_rst_api_v5.1' into 'release/v5.1' 
modem_clock: add modem module mac reset api (backport v5.1)

See merge request espressif/esp-idf!24441
 2023-07-04 12:15:33 +08:00
Jiang Jiang Jian
207e589917 Merge branch 'bugfix/support_esp32c6_sleep_retention_extra_link_v5.1' into 'release/v5.1' 
backport v5.1: support extra linked list retention for BLE and 15.4

See merge request espressif/esp-idf!24220
 2023-07-04 12:11:04 +08:00
cjin
30a67ed72c btbb: support register retention in esp32c6 2023-07-04 12:09:22 +08:00
cjin
e72359fc66 ble:added esp32c6 light sleep support 2023-07-04 12:09:22 +08:00
cjin
06c6281add ble: support esp32h2 modem clock selection 2023-07-03 11:45:16 +08:00
Mahavir Jain
0bf93134f4 Merge branch 'feature/anti_dpa_configuration_c6_h2_v5.1' into 'release/v5.1' 
esp32c6/esp32h2: crypto: add support for DPA protection configuration (v5.1)

See merge request espressif/esp-idf!24128
 2023-06-30 23:50:44 +08:00
Jiang Jiang Jian
cbce221e88 Merge branch 'bugfix/mac_ext_order_for_c6_h2_v5.1' into 'release/v5.1' 
efuse: Fix byte order in MAC_EXT (for C6 and H2) (v5.1)

See merge request espressif/esp-idf!23990
 2023-06-28 17:33:53 +08:00
wuzhenghui
2e5a194f62 esp_hw_support: add modem module mac reset api 2023-06-28 14:01:29 +08:00
wuzhenghui
1c12743d44 sleep: enable sleep reject when entering deep sleep and return err if sleep request is rejected 2023-06-28 13:55:16 +08:00
Li Shuai
ccd4ff2945 sleep retention: implement the extra linked list retention for modules with retention clock bugs 2023-06-13 21:05:36 +08:00
KonstantinKondrashov
e44a6888ea mac_addr(C6 and H2): Fix byte order of MAC_EXT and change format of IEEE802154 MAC 
The changes only related to C6 and H2 chips where CONFIG_SOC_IEEE802154_SUPPORTED=y.
For this case these APIs return 8 bytes
    esp_efuse_mac_get_default() -> 8 bytes
    esp_efuse_mac_get_custom() -> 8 bytes
    esp_read_mac(..., ESP_MAC_IEEE802154) -> 8 bytes
The rest cases len is 6 bytes
 2023-06-13 16:56:13 +08:00
Mahavir Jain
1764a0bd28
crypto: add support for DPA protection configuration in C6/H2 
- Technical details covered in section "15.3.2 Anti-DPA Attack Security
Control" chapter of the ESP32-C6 TRM
- Default configuration sets the security level low for the DPA
protection
- This change applies to all the crypto peripherals where the clock
frequency is dynamically adjusted to create randomness in the power
consumption trajectory
- This configuration helps to make the SCA attacks difficult on the
crypto peripherals
 2023-06-08 20:37:03 +05:30
xuxiao
5a21bea309 esp_wifi: itwt add setup timeout timer to track response frame 2023-06-02 19:46:15 +08:00
wuzhenghui
1df2dcc9fe bugfix: treat too short sleep duration as sleep reject by software 2023-05-19 13:51:24 +08:00
Jakob Hasse
a6cbf68991 compiler: replaced noreturn by __noreturn__ in header files 
* noreturn may be replaced by third-party macros,
  rendering it ineffective

* Closes https://github.com/espressif/esp-idf/issues/11339
 2023-05-18 12:49:40 +08:00
Magnus Sörensen
accb45f466 Update esp_cpu.h 
If esp_attr.h is not included then there are no definitions for the symbol 'FORCE_INLINE_ATTR'.
 2023-05-16 04:37:17 +00:00
Jakob Hasse
48ab527148 cxx/esp_hw_support: added build test, changed parameter types 
Changed rv_utils_intr_edge_ack and esp_cpu_intr_edge_ack to
take uint32_t instead of int to avoid build errors.

The test is to test in particular that __builtin_ffsll, used in
xt_utils.h, which is included via esp_cpu.h, compiles fine
in C++20 with -Wsign-conversion enabled.

Closes https://github.com/espressif/esp-idf/pull/10895
 2023-05-11 11:16:45 +08:00
morris
cbd210b431 Merge branch 'refactor/rename_to_esp_clk_tree_prefix_v5.1' into 'release/v5.1' 
esp_clk_tree: Rename clk_tree_xxx to esp_clk_tree_xxx (v5.1)

See merge request espressif/esp-idf!23449
 2023-04-28 17:11:46 +08:00
Mahavir Jain
c49dce48eb Merge branch 'fix/esp32s3_ununsed_dcache_as_dram_v5.1' into 'release/v5.1' 
esp_hw_support: Update the memory ptr location/property checks to include the unused DCACHE added to DRAM (v5.1)

See merge request espressif/esp-idf!23303
 2023-04-27 22:09:55 +08:00
Song Ruo Jing
202b18b5fa esp_clk_tree: Rename clk_tree_xxx to esp_clk_tree_xxx, add compilation warning to clk_tree.h 2023-04-27 11:11:18 +00:00
Marius Vikhammer
0bac174058 ulp: added sleep support for lp core 
Added support for running LP core while hp core sleeps, as well
as waking up the hp core.
 2023-04-27 09:51:41 +08:00
laokaiyao
804a9ea1f6 esp32h4: remove esp32h4 target from peripherals 2023-04-26 18:53:10 +08:00
Laukik Hase
3118120659 esp_hw_support: Update memory ptr location/property checks 
- to acknowledge the unused DCACHE added to DRAM for ESP32-S3

- For ESP32-S3, when the DCACHE size is set to 16 kB, the unused 48 kB is added to
  the heap in 2 blocks of 32 kB (from 0x3FCF0000) and 16 kB (from 0x3C000000).
- But, if we try allocating memory from the 16 kB block and run an `esp_ptr_internal`
  check on that memory pointer, it fails as the address block from 0x3C000000
  corresponds to the external memory symbols SOC_DROM_LOW and SOC_EXTRAM_DATA_LOW.
  (E.g. freertos - If the IDLE task stack buffer gets allocated from this region,
  the firmware will abort due to this failure).
- Thus, the checks `esp_ptr_internal`, `esp_ptr_in_drom` and `esp_ptr_byte_accessible`
  have been updated to acknowledge this memory as a part of the DRAM.

Co-authored-by: Mahavir Jain <mahavir@espressif.com>
 2023-04-26 04:01:38 +00:00