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feat(pm/deepsleep): Support EXT1 wakeup for esp32h2 deep_sleep
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -26,10 +26,17 @@ typedef void (*esp_deep_sleep_cb_t)(void);
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/**
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* @brief Logic function used for EXT1 wakeup mode.
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*/
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#if CONFIG_IDF_TARGET_ESP32
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typedef enum {
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ESP_EXT1_WAKEUP_ALL_LOW = 0, //!< Wake the chip when all selected GPIOs go low
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ESP_EXT1_WAKEUP_ANY_HIGH = 1 //!< Wake the chip when any of the selected GPIOs go high
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} esp_sleep_ext1_wakeup_mode_t;
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#else
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typedef enum {
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ESP_EXT1_WAKEUP_ANY_LOW = 0, //!< Wake the chip when any of the selected GPIOs go low
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ESP_EXT1_WAKEUP_ANY_HIGH = 1 //!< Wake the chip when any of the selected GPIOs go high
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} esp_sleep_ext1_wakeup_mode_t;
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#endif
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#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
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typedef enum {
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@ -20,14 +20,13 @@
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#include "driver/gpio.h"
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#include "hal/gpio_hal.h"
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#include "hal/rtc_io_hal.h"
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#include "soc/rtc_io_periph.h"
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#if SOC_LP_AON_SUPPORTED
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#include "hal/lp_aon_hal.h"
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#else
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#if !CONFIG_IDF_TARGET_ESP32H2
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#include "hal/rtc_hal.h"
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#endif
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#endif
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#include "esp_private/gpio.h"
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#include "esp_private/sleep_gpio.h"
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@ -32,11 +32,9 @@
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#if SOC_LP_AON_SUPPORTED
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#include "hal/lp_aon_hal.h"
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#else
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#if !CONFIG_IDF_TARGET_ESP32H2
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#include "hal/rtc_cntl_ll.h"
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#include "hal/rtc_hal.h"
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#endif
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#endif
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#include "driver/uart.h"
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@ -90,6 +88,7 @@
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#include "esp32h2/rom/cache.h"
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#include "esp32h2/rom/rtc.h"
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#include "soc/extmem_reg.h"
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#include "hal/gpio_ll.h"
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#endif
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#if SOC_LP_TIMER_SUPPORTED
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@ -832,8 +831,6 @@ void IRAM_ATTR esp_deep_sleep_start(void)
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if (esp_get_deep_sleep_wake_stub() == NULL) {
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esp_set_deep_sleep_wake_stub(esp_wake_deep_sleep);
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}
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// assert(0);
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#endif // SOC_RTC_FAST_MEM_SUPPORTED
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// Decide which power domains can be powered down
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@ -1372,8 +1369,18 @@ static void ext1_wakeup_prepare(void)
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rtcio_hal_function_select(rtc_pin, RTCIO_FUNC_RTC);
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// set input enable in sleep mode
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rtcio_hal_input_enable(rtc_pin);
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#endif
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#else
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/* ESP32H2 use hp iomux to config rtcio, and there is no complete
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* rtcio functionality. In the case of EXT1 wakeup, rtcio only provides
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* a pathway to EXT1. */
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// Route pad to DIGITAL
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rtcio_hal_function_select(rtc_pin, RTCIO_FUNC_DIGITAL);
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// set input enable
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gpio_ll_input_enable(&GPIO, gpio);
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// hold rtc_pin to use it during sleep state
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rtcio_hal_hold_enable(rtc_pin);
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#endif
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#if SOC_PM_SUPPORT_RTC_PERIPH_PD
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// Pad configuration depends on RTC_PERIPH state in sleep mode
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if (s_config.domain[ESP_PD_DOMAIN_RTC_PERIPH].pd_option != ESP_PD_OPTION_ON) {
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@ -1423,20 +1430,14 @@ uint64_t esp_sleep_get_ext1_wakeup_status(void)
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#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
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uint64_t esp_sleep_get_gpio_wakeup_status(void)
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{
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#if CONFIG_IDF_TARGET_ESP32H2 // TODO: IDF-6268
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return 0;
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#else
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if (esp_sleep_get_wakeup_cause() != ESP_SLEEP_WAKEUP_GPIO) {
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return 0;
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}
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return rtc_hal_gpio_get_wakeup_status();
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#endif // !CONFIG_IDF_TARGET_ESP32H2
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}
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static void gpio_deep_sleep_wakeup_prepare(void)
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{
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#if !CONFIG_IDF_TARGET_ESP32H2 // TODO: IDF-6268
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for (gpio_num_t gpio_idx = GPIO_NUM_0; gpio_idx < GPIO_NUM_MAX; gpio_idx++) {
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if (((1ULL << gpio_idx) & s_config.gpio_wakeup_mask) == 0) {
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continue;
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@ -1452,7 +1453,6 @@ static void gpio_deep_sleep_wakeup_prepare(void)
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}
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// Clear state from previous wakeup
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rtc_hal_gpio_clear_wakeup_status();
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#endif // !CONFIG_IDF_TARGET_ESP32H2
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}
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esp_err_t esp_deep_sleep_enable_gpio_wakeup(uint64_t gpio_pin_mask, esp_deepsleep_gpio_wake_up_mode_t mode)
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@ -8,17 +8,10 @@
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#include "hal/lp_aon_ll.h"
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#define rtc_hal_ext1_get_wakeup_status() lp_aon_hal_ext1_get_wakeup_status()
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#define rtc_hal_ext1_clear_wakeup_status() lp_aon_hal_ext1_clear_wakeup_status()
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#define rtc_hal_ext1_set_wakeup_pins(mask, mode) lp_aon_hal_ext1_set_wakeup_pins(mask, mode)
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#define rtc_hal_ext1_clear_wakeup_pins() lp_aon_hal_ext1_clear_wakeup_pins()
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#define rtc_hal_ext1_get_wakeup_pins() lp_aon_hal_ext1_get_wakeup_pins()
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#define lp_aon_hal_ext1_get_wakeup_status() lp_aon_ll_ext1_get_wakeup_status()
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#define lp_aon_hal_ext1_clear_wakeup_status() lp_aon_ll_ext1_clear_wakeup_status()
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#define lp_aon_hal_ext1_set_wakeup_pins(mask, mode) lp_aon_ll_ext1_set_wakeup_pins(mask, mode)
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#define lp_aon_hal_ext1_clear_wakeup_pins() lp_aon_ll_ext1_clear_wakeup_pins()
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#define lp_aon_hal_ext1_get_wakeup_pins() lp_aon_ll_ext1_get_wakeup_pins()
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#define rtc_hal_ext1_get_wakeup_status() lp_aon_ll_ext1_get_wakeup_status()
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#define rtc_hal_ext1_clear_wakeup_status() lp_aon_ll_ext1_clear_wakeup_status()
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#define rtc_hal_ext1_set_wakeup_pins(mask, mode) lp_aon_ll_ext1_set_wakeup_pins(mask, mode)
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#define rtc_hal_ext1_clear_wakeup_pins() lp_aon_ll_ext1_clear_wakeup_pins()
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#define rtc_hal_ext1_get_wakeup_pins() lp_aon_ll_ext1_get_wakeup_pins()
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#define lp_aon_hal_inform_wakeup_type(dslp) lp_aon_ll_inform_wakeup_type(dslp)
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#include "hal/lp_aon_ll.h"
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#define rtc_hal_ext1_get_wakeup_status() lp_aon_hal_ext1_get_wakeup_status()
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#define rtc_hal_ext1_clear_wakeup_status() lp_aon_hal_ext1_clear_wakeup_status()
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#define rtc_hal_ext1_set_wakeup_pins(mask, mode) lp_aon_hal_ext1_set_wakeup_pins(mask, mode)
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#define rtc_hal_ext1_clear_wakeup_pins() lp_aon_hal_ext1_clear_wakeup_pins()
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#define rtc_hal_ext1_get_wakeup_pins() lp_aon_hal_ext1_get_wakeup_pins()
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#define lp_aon_hal_ext1_get_wakeup_status() lp_aon_ll_ext1_get_wakeup_status()
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#define lp_aon_hal_ext1_clear_wakeup_status() lp_aon_ll_ext1_clear_wakeup_status()
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#define lp_aon_hal_ext1_set_wakeup_pins(mask, mode) lp_aon_ll_ext1_set_wakeup_pins(mask, mode)
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#define lp_aon_hal_ext1_clear_wakeup_pins() lp_aon_ll_ext1_clear_wakeup_pins()
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#define lp_aon_hal_ext1_get_wakeup_pins() lp_aon_ll_ext1_get_wakeup_pins()
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#define rtc_hal_ext1_get_wakeup_status() lp_aon_ll_ext1_get_wakeup_status()
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#define rtc_hal_ext1_clear_wakeup_status() lp_aon_ll_ext1_clear_wakeup_status()
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#define rtc_hal_ext1_set_wakeup_pins(mask, mode) lp_aon_ll_ext1_set_wakeup_pins(mask, mode)
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#define rtc_hal_ext1_clear_wakeup_pins() lp_aon_ll_ext1_clear_wakeup_pins()
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#define rtc_hal_ext1_get_wakeup_pins() lp_aon_ll_ext1_get_wakeup_pins()
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#define lp_aon_hal_inform_wakeup_type(dslp) lp_aon_ll_inform_wakeup_type(dslp)
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* SPDX-License-Identifier: Apache-2.0
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*/
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// The LL layer for ESP32-C6 LP_AON register operations
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// The LL layer for ESP32-H2 LP_AON register operations
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#pragma once
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@ -171,6 +171,10 @@ config SOC_LP_TIMER_SUPPORTED
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bool
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default y
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config SOC_LP_AON_SUPPORTED
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bool
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default y
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config SOC_PAU_SUPPORTED
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bool
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default y
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@ -1075,14 +1079,14 @@ config SOC_PHY_DIG_REGS_MEM_SIZE
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int
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default 21
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config SOC_PM_SUPPORT_EXT1_WAKEUP
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bool
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default n
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config SOC_PM_SUPPORT_BT_WAKEUP
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bool
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default y
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config SOC_PM_SUPPORT_EXT1_WAKEUP
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bool
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default y
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config SOC_PM_SUPPORT_CPU_PD
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bool
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default y
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#define SOC_APM_SUPPORTED 1
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#define SOC_PMU_SUPPORTED 1
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#define SOC_LP_TIMER_SUPPORTED 1
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#define SOC_LP_AON_SUPPORTED 1
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#define SOC_PAU_SUPPORTED 1
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#define SOC_CLK_TREE_SUPPORTED 1
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@ -454,8 +455,8 @@
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#define SOC_PHY_DIG_REGS_MEM_SIZE (21*4)
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/*-------------------------- Power Management CAPS ----------------------------*/
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#define SOC_PM_SUPPORT_EXT1_WAKEUP (0)
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#define SOC_PM_SUPPORT_BT_WAKEUP (1)
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#define SOC_PM_SUPPORT_EXT1_WAKEUP (1)
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#define SOC_PM_SUPPORT_CPU_PD (1)
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#define SOC_PM_SUPPORT_MODEM_PD (1) /*!<modem includes BLE and 15.4 */
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#define SOC_PM_SUPPORT_XTAL32K_PD (1)
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@ -60,11 +60,9 @@ menu "Example Configuration"
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config EXAMPLE_GPIO_WAKEUP_PIN
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int "Enable wakeup from GPIO"
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default 0 if !IDF_TARGET_ESP32H2
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default 7 if IDF_TARGET_ESP32H2
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default 0
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range 0 7 if IDF_TARGET_ESP32C6
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range 7 14 if IDF_TARGET_ESP32H2
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range 0 5 if !IDF_TARGET_ESP32C6 && !IDF_TARGET_ESP32H2
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range 0 5 if !IDF_TARGET_ESP32C6
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config EXAMPLE_GPIO_WAKEUP_HIGH_LEVEL
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bool "Enable GPIO high-level wakeup"
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@ -9,6 +9,7 @@
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#include "sdkconfig.h"
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#include "driver/rtc_io.h"
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#if CONFIG_EXAMPLE_EXT0_WAKEUP
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#if CONFIG_IDF_TARGET_ESP32
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const int ext_wakeup_pin_0 = 25;
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@ -32,11 +33,16 @@ void example_deep_sleep_register_ext0_wakeup(void)
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#if CONFIG_EXAMPLE_EXT1_WAKEUP
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void example_deep_sleep_register_ext1_wakeup(void)
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{
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#if !CONFIG_IDF_TARGET_ESP32H2
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const int ext_wakeup_pin_1 = 2;
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const uint64_t ext_wakeup_pin_1_mask = 1ULL << ext_wakeup_pin_1;
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const int ext_wakeup_pin_2 = 4;
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const uint64_t ext_wakeup_pin_2_mask = 1ULL << ext_wakeup_pin_2;
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#else
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const int ext_wakeup_pin_1 = 10;
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const int ext_wakeup_pin_2 = 11;
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#endif
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const uint64_t ext_wakeup_pin_1_mask = 1ULL << ext_wakeup_pin_1;
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const uint64_t ext_wakeup_pin_2_mask = 1ULL << ext_wakeup_pin_2;
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printf("Enabling EXT1 wakeup on pins GPIO%d, GPIO%d\n", ext_wakeup_pin_1, ext_wakeup_pin_2);
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ESP_ERROR_CHECK(esp_sleep_enable_ext1_wakeup(ext_wakeup_pin_1_mask | ext_wakeup_pin_2_mask, ESP_EXT1_WAKEUP_ANY_HIGH));
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@ -44,11 +50,18 @@ void example_deep_sleep_register_ext1_wakeup(void)
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* during deepsleep. However, RTC IO relies on the RTC_PERIPH power domain. Keeping this power domain on will
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* increase some power comsumption. */
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#if CONFIG_EXAMPLE_EXT1_USE_INTERNAL_PULLUPS
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#if !CONFIG_IDF_TARGET_ESP32H2
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ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_RTC_PERIPH, ESP_PD_OPTION_ON));
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ESP_ERROR_CHECK(rtc_gpio_pullup_dis(ext_wakeup_pin_1));
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ESP_ERROR_CHECK(rtc_gpio_pulldown_en(ext_wakeup_pin_1));
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ESP_ERROR_CHECK(rtc_gpio_pullup_dis(ext_wakeup_pin_2));
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ESP_ERROR_CHECK(rtc_gpio_pulldown_en(ext_wakeup_pin_2));
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#else
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gpio_pullup_dis(ext_wakeup_pin_1);
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gpio_pulldown_en(ext_wakeup_pin_1);
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gpio_pullup_dis(ext_wakeup_pin_2);
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gpio_pulldown_en(ext_wakeup_pin_2);
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#endif
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#endif //CONFIG_EXAMPLE_EXT1_USE_INTERNAL_PULLUPS
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}
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