Angus Gratton
a9854f7085
Merge branch 'feature/rmt_clock_support_ref_tick' into 'master'
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rmt: support ref tick && refactor unit test && re-enable unit test on ESP32-S2
Closes IDFGH-1715
See merge request espressif/esp-idf!7614
2020-03-06 15:03:52 +08:00
Michael (XIAO Xufeng)
8e348dcdcd
Merge branch 'bugfix/fix_driver_ut_i2s' into 'master'
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bugfix(i2s): fix driver ut i2s
See merge request espressif/esp-idf!6946
2020-03-06 11:55:07 +08:00
Jiang Jiang Jian
b7a14c47e6
Merge branch 'bugfix/customer_baidu_psram_stack_backtrace' into 'master'
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added psram stack check in backtrace
See merge request espressif/esp-idf!7834
2020-03-06 11:35:54 +08:00
chaijie
66beaaef7d
soc(rtc): modify rtc code in soc for esp32s2
2020-03-03 13:22:52 +00:00
morris
07088c6446
rmt: disable carrier feature by default
2020-03-03 20:14:46 +08:00
morris
0e4d82bc55
rmt: support REF_TICK as channel clock source
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Closes https://github.com/espressif/esp-idf/pull/3952
2020-03-03 20:14:46 +08:00
morris
3c43264f83
rmt: add RMT_CHANNELS_NUM in rmt_caps.h
2020-03-03 20:14:45 +08:00
xiongyu
b3ae9fa978
bugfix(i2s): Updated ESP32-S2 ADC DAC support
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* Delete the relevant codes of ADC DAC of ESP32-S2.
2020-03-03 12:59:30 +08:00
fuzhibo
3ad5138dd8
fix coexist i2s_adc and rtc_adc
2020-03-03 11:58:53 +08:00
xiongyu
faf898b659
bugfix(i2s): fix driver ut i2s
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* Add test support for ESP32S2
* Add loop back test
* Support chip internal connection, no external wiring required.
* Delete the relevant codes of PDM of ESP32-S2 ll layer.
* fix dac dma mode issue
2020-03-03 11:58:53 +08:00
Li Shuai
c796e14964
added psram stack check in backtrace
2020-03-03 11:52:29 +08:00
Angus Gratton
04ccb84b83
Merge branch 'feature/cpu_abstraction' into 'master'
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CPU related operations abstraction
See merge request espressif/esp-idf!7301
2020-02-28 11:54:29 +08:00
Michael (XIAO Xufeng)
ce3ab0b8df
Merge branch 'bugfix/nec_example' into 'master'
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bugfix in NEC example and low level function
Closes IDFGH-2676 and IDFGH-2689
See merge request espressif/esp-idf!7562
2020-02-28 11:00:50 +08:00
Mahavir Jain
5f897fd33c
Merge branch 'feat/secure_boot_v2_v41' into 'master'
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feat/secure_boot_v2: Adding secure boot v2 support to ESP32-ECO3
Closes IDF-799
See merge request espressif/esp-idf!6778
2020-02-27 18:54:08 +08:00
Angus Gratton
d40c69375c
bootloader: Add fault injection resistance to Secure Boot bootloader verification
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Goal is that multiple faults would be required to bypass a boot-time signature check.
- Also strengthens some address range checks for safe app memory addresses
- Change pre-enable logic to also check the bootloader signature before enabling SBV2 on ESP32
Add some additional checks for invalid sections:
- Sections only partially in DRAM or IRAM are invalid
- If a section is in D/IRAM, allow the possibility only some is in D/IRAM
- Only pass sections that are entirely in the same type of RTC memory region
2020-02-27 14:37:19 +05:30
Michael (XIAO Xufeng)
7f8c827326
Merge branch 'bugfix/fix_driver_ut_pcnt' into 'master'
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bugfix(pcnt): fix driver ut pcnt
See merge request espressif/esp-idf!6891
2020-02-27 11:29:28 +08:00
Renz Christian Bagaporo
d46989efa3
soc: remove param checking in cpu related abstractions
2020-02-27 07:15:15 +05:00
Renz Christian Bagaporo
f75cb2ef00
soc: change cpu stall, unstall, and reset core to not return values
2020-02-27 07:15:15 +05:00
Renz Christian Bagaporo
d5c123c1f5
soc: use own macro to assert proper args for cpu abstractions
2020-02-27 07:15:15 +05:00
Renz Christian Bagaporo
7f864d24ad
soc: prefer assertions, disabling functions for cpu abstractions
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Prefer assertions, making available functions only when caps support it
for cpu-related abstractions.
Changes cpu hal functions to stall, unstall, reset to not accept -1;
instead prefering macros that provide the same functionality.
2020-02-27 07:15:14 +05:00
Renz Christian Bagaporo
cefc71cdcd
bootloader_support: mem-related initializations using cpu abstractions
2020-02-27 07:14:21 +05:00
Renz Christian Bagaporo
f3c6320ff6
soc: implement cpu utils in terms of cpu abstractions
2020-02-27 07:14:21 +05:00
Renz Christian Bagaporo
c9a51bfbb2
soc: create abstraction for cpu related operations
2020-02-27 07:14:19 +05:00
Sachin Parekh
301dacfb33
Exception handlers for LoadStoreError and LoadStoreAlignmentError
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Configurable option to use IRAM as byte accessible memory (in single core mode) using
load-store (non-word aligned and non-word size IRAM access specific) exception handlers.
This allows to use IRAM for use-cases where certain performance penalty
(upto 170 cpu cycles per load or store operation) is acceptable. Additional configuration
option has been provided to redirect mbedTLS specific in-out content length buffers to
IRAM (in single core mode), allows to save 20KB per TLS connection.
2020-02-26 20:21:59 +08:00
Michael (XIAO Xufeng)
c53192d521
Merge branch 'bugfix/fix_uart_set_line_inverse_breaking_change_issue' into 'master'
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Bugfix(uart): fix uart_set_line_inverse breaking change issue
Closes IDFGH-2469
See merge request espressif/esp-idf!7345
2020-02-26 18:34:52 +08:00
xiongyu
4d5c950770
bugfix(pcnt): fix driver ut pcnt
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* Let `[ignore] case` return to freedom
1) Because this test uses its own ISR, we need to release it with `esp_intr_free` instead of `pcnt_isr_service_uninstall`.
2) `pcnt_evt_queue` needs to be created before the interrupt is registered and needs to be released at the end of each case.
* Add test support for ESP32S2
* Support chip internal connection, no external wiring required.
2020-02-26 16:52:53 +08:00
Michael (XIAO Xufeng)
8f496a0f96
Merge branch 'refactor/add_ll_for_clock_gate_operation' into 'master'
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periph_ctrl: move target specific into ll files
See merge request espressif/esp-idf!7733
2020-02-25 16:56:30 +08:00
morris
e9717fc07b
periph_ctrl: move target specific into ll files
2020-02-24 14:50:26 +08:00
morris
ea8d6318af
add SOC_EMAC_SUPPORTED in soc_caps.h
2020-02-24 11:57:58 +08:00
houwenxiang
c07e4c775d
driver(uart): fix uart_set_line_inverse breaking change issue
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closes https://github.com/espressif/esp-idf/issues/4581
2020-02-24 11:36:31 +08:00
Fu Zhi Bo
7a5b67b8de
rtcio: fix rtcio unhold function
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Solve problems caused by code refactoring.
Closes https://github.com/espressif/esp-idf/issues/4600
2020-02-20 15:42:28 +08:00
Ivan Grokhotkov
40cff27053
Merge branch 'feature/esp32s2_pm' into 'master'
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esp32s2: power management (DFS and auto light sleep)
Closes IDF-670, IDF-527, and IDFGH-231
See merge request espressif/esp-idf!7578
2020-02-19 18:26:33 +08:00
Ivan Grokhotkov
fe0df01b12
Merge branch 'bugfix/from_github' into 'master'
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Fixes from Github
Closes IDFGH-2679, IDFGH-2632, IDFGH-2716, IDFGH-2439, and IDFGH-2509
See merge request espressif/esp-idf!7659
2020-02-18 23:53:38 +08:00
Alexander Borsuk
e489e48dfa
Fixes compilation error on verbose level (IDFGH-2439)
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Closes #4552
Merges https://github.com/espressif/esp-idf/pull/4786
2020-02-18 12:30:47 +01:00
Jiang Jiang Jian
1a7d0b3b6f
Merge branch 'bugfix/esp32s2_rng' into 'master'
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soc: esp32s2: fix address of WDEV_RND_REG
Closes IDF-1390
See merge request espressif/esp-idf!7640
2020-02-18 19:07:51 +08:00
Ivan Grokhotkov
19c2337168
soc: esp32s2: fix address of WDEV_RND_REG
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Ref. ESP32-S2 TRM.
Closes IDF-1390
2020-02-18 08:24:33 +01:00
Ivan Grokhotkov
383ace9443
rtc_clk_cal: make compatible with the ESP32
2020-02-17 17:33:56 +01:00
Ivan Grokhotkov
490bf29767
esp32s2: fix enabling 32k XTAL clock
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On the ESP32S2, rtc_clk_cal(RTC_CAL_RTC_MUX) measures the frequency
of the 90kHz RTC clock regardless of the selected slow clock
frequency. Keep track which clock is selected and pass the argument
to rtc_clk_cal accordingly.
fix clock choices
update rtc 32k xtal code for s2
missed api in rtc.h
bootloader_clock: update for S2
2020-02-17 17:33:56 +01:00
Ivan Grokhotkov
74ac618287
soc/rtc: update frequency switching APIs to match the master branch
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esp32s2 code was based in IDF v3.1, and used outdated APIs.
Closes IDF-670
2020-02-17 17:23:32 +01:00
xiongyu
61778d5b7c
bugfix(i2s): fix adc output invert issue
2020-02-17 17:15:01 +08:00
morris
0d521e8f9d
rmt: fix missing 0x in rmt_ll.h
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Closes https://github.com/espressif/esp-idf/issues/4760
2020-02-17 15:20:41 +08:00
Krzysztof Budzynski
41bc06b9b9
Merge branch 'bugfix/docs_ledc' into 'master'
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drivers: Remove high speed mode from LEDC docs for ESP32-S2, update headers to match
See merge request espressif/esp-idf!7532
2020-02-17 05:00:36 +08:00
Jiang Jiang Jian
cedea18acb
Merge branch 'bugfix/wifi_clear_phy_status_when_cpu_start' into 'master'
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soc: clear PHY status when cpu start
Closes AUD-1125
See merge request espressif/esp-idf!7493
2020-02-12 15:34:46 +08:00
Renz Christian Bagaporo
16e0c93e40
ci: solve public headers errors
2020-02-11 14:30:42 +05:00
Renz Christian Bagaporo
b675df4b08
soc: use include_next for including common touch sensor hal header
2020-02-11 14:30:42 +05:00
Renz Christian Bagaporo
1f2e2fe8af
soc: separate abstraction, description and implementation
2020-02-11 14:30:42 +05:00
Angus Gratton
ea34f3bb27
drivers: Remove high speed mode from LEDC docs for ESP32-S2, update headers to match
2020-02-11 14:36:47 +11:00
Andrei Gramakov
4e8b4b9e49
soc: add USB peripheral register definitions, hal level, reg map, etc
2020-02-10 08:33:39 +00:00
Konstantin Kondrashov
daa9c30c8e
rmt/esp32s2: Update RMT: reg, struct, LL and test_utils/ref_clock.c
2020-02-09 20:03:31 +08:00
Ivan Grokhotkov
4bfd0b961b
Merge branch 'fix/spi_on_esp32s2' into 'master'
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spi: support esp32s2
See merge request espressif/esp-idf!7432
2020-02-09 19:45:16 +08:00