Commit Graph

18 Commits

Author SHA1 Message Date
bizhuangyang
1829783886 bugfix:rotary encoder example isr service install
Fix the issue mentioned when using two or more encoders. Modify PCNT_CTRL_GND_IO
to avoid the affect of USB JTAG(origin pin 19 is used for USB D-). Update esp32c3.
peripherals.ld and docs for esp32s3.

Closes https://github.com/espressif/esp-idf/issues/6889
2021-06-30 18:44:02 +08:00
Jan Brudný
58f79e6b00 driver: update copyright notice 2021-05-24 01:06:17 +02:00
morris
906dd0ad84 pcnt: replace isr register with isr service in example 2020-10-19 11:56:18 +08:00
Michael (XIAO Xufeng)
647dea9395 soc: combine xxx_caps.h into one soc_caps.h
During HAL layer refactoring and new chip bringup, we have several
caps.h for each part, to reduce the conflicts to minimum. But this is
The capabilities headers will be relataive stable once completely
written (maybe after the featues are supported by drivers).

Now ESP32 and ESP32-S2 drivers are relative stable, making it a good
time to combine all these caps.h into one soc_caps.h

This cleanup also move HAL config and pin config into separated files,
to make the responsibilities of these headers more clear. This is
helpful for the stabilities of soc_caps.h because we want to make it
public some day.
2020-10-17 16:10:15 +08:00
morris
9fa06719fa global: enable build uinit test for esp32-s3 2020-09-22 15:15:03 +08:00
morris
a4d0033c03 esp_rom: extract common GPIO apis into esp_rom_gpio.h 2020-07-07 11:40:19 +08:00
xiongyu
4d5c950770 bugfix(pcnt): fix driver ut pcnt
* Let `[ignore] case` return to freedom

  1) Because this test uses its own ISR, we need to release it with `esp_intr_free` instead of `pcnt_isr_service_uninstall`.

  2) `pcnt_evt_queue` needs to be created before the interrupt is registered and needs to be released at the end of each case.

* Add test support for ESP32S2

* Support chip internal connection, no external wiring required.
2020-02-26 16:52:53 +08:00
Felipe Neves
429712c6eb freertos: moved all xtensa specific files into a separated folder 2020-01-27 16:05:30 -03:00
morris
e30cd361a8 global: rename esp32s2beta to esp32s2 2020-01-22 12:14:38 +08:00
michael
4220752aed ut: Move tests back from "esp32" subfolder
DISABLED_FOR_TARGETS macros are used

Partly revert "ci: disable unavailable tests for esp32s2beta"

This partly reverts commit 76a3a5fb48.

Partly revert "ci: disable UTs for esp32s2beta without runners"

This partly reverts commit eb158e9a22.

Partly revert "fix unit test and examples for s2beta"

This partly reverts commit 9baa7826be.

Partly revert "efuse: Add support for esp32s2beta"

This partly reverts commit db84ba868c.
2020-01-06 17:13:53 +08:00
Michael (XIAO Xufeng)
9baa7826be fix unit test and examples for s2beta 2019-09-04 10:53:25 +10:00
Angus Gratton
848465da90 driver: Check ledc config result in PCNT tests 2019-08-15 06:53:46 +00:00
kooho
2e8c85d8ff driver(ledc): fixed ledc clock selection bug. 2019-08-06 16:11:18 +08:00
Konstantin Kondrashov
399d2d2605 all: Using xxx_periph.h
Using xxx_periph.h in whole IDF instead of xxx_reg.h, xxx_struct.h, xxx_channel.h ... .

Cleaned up header files from unnecessary headers (releated to soc/... headers).
2019-06-03 14:15:08 +08:00
morris
c159984264 separate rom from esp32 component to esp_rom
1. separate rom include files and linkscript to esp_rom
2. modefiy "include rom/xxx.h" to "include esp32/rom/xxx.h"
3. Forward compatible
4. update mqtt
2019-03-21 18:51:45 +08:00
houchenyao
f647ea81cc pcnt test: ignore pcnt two test cases
a bug caused by pcnt. these two cases has about 10% fail ratio. they fail randomly in CI. stress test needed. they are ignored until this bug fixed.
2018-09-06 19:42:20 +08:00
houchenyao
1878109a7f bugfix: fix pcnt case "PCNT interrupt method test(control IO is high)" 2018-06-26 13:35:14 +08:00
houchenyao
3238c6f968 test: components/driver: pcnt case 2018-06-20 06:00:26 +00:00