Commit Graph

26 Commits

Author SHA1 Message Date
Mahavir Jain
bdeaeb8d7f esp_system: enable "cache disable but cache accessed" interrupt for ESP32-S3 2021-10-20 15:16:25 +05:30
Zim Kalinowski
584806a78a updated copyright text 2021-10-11 11:38:35 +08:00
Zim Kalinowski
f2b538b9e7 Merge branch 'master' into feature/github-7517 2021-10-09 18:58:27 +08:00
David Čermák
9f957cbfe2 Merge branch 'bugfix/memprot_panic_print_const_correction' into 'master'
panic: Fix minor const string correction on meprot panic print

See merge request espressif/esp-idf!14851
2021-09-13 06:13:33 +00:00
David Cermak
0ee4c235eb panic/memprot: Fix minor const string correction on panic print 2021-09-09 11:46:21 +02:00
baohongde
d1db2df316 components/bt: High level interrupt in bluetooth
components/os: Move ETS_T1_WDT_INUM, ETS_CACHEERR_INUM and ETS_DPORT_INUM to l5 interrupt

components/os: high level interrupt(5)

components/os: hli_api: meta queue: fix out of bounds access, check for overflow

components/os: hli: don't spill registers, instead save them to a separate region

Level 4 interrupt has a chance of preempting a window overflow or underflow exception.
Therefore it is not possible to use standard context save functions,
as the SP on entry to Level 4 interrupt may be invalid (e.g. in WindowUnderflow4).

Instead, mask window overflows and save the entire general purpose register file,
plus some of the special registers.
Then clear WindowStart, allowing the C handler to execute without spilling the old windows.
On exit from the interrupt handler, do everything in reverse.

components/bt: using high level interrupt in lc

components/os: Add DRAM_ATTR to avoid feature `Allow .bss segment placed in external memory`

components/bt: optimize code structure

components/os: Modify the BT assert process to adapt to coredump and HLI

components/os: Disable exception mode after saving special registers

To store some registers first, avoid stuck due to live lock after disabling exception mode

components/os: using dport instead of AHB in BT to fix live lock

components/bt: Fix hli queue send error

components/bt: Fix CI fail

# Conflicts:
#	components/bt/CMakeLists.txt
#	components/bt/component.mk
#	components/bt/controller/bt.c
#	components/bt/controller/lib
#	components/esp_common/src/int_wdt.c
#	components/esp_system/port/soc/esp32/dport_panic_highint_hdl.S
#	components/soc/esp32/include/soc/soc.h
2021-09-09 11:29:06 +08:00
boarchuz
ec70bc0523 fix compiler warning with silent panic option 2021-09-04 14:46:26 +10:00
Martin Vychodil
58aed7df98 ESP32S2: No assert()/abort() in Memprot API, use esp_err_t instead
JIRA IDF-3634
2021-08-26 09:20:00 +02:00
Omar Chebib
0771bd1711 espsystem: Rearchitecture and fix eh_frame_parser bugs
eh_frame_parser is architecture independent, thus the files have
been rearchitectured. Some bugs have been fixed in the test.
A README file has also been added to eh_frame_parser host test
directory.

eh_frame_parser is now able to detect empty gaps in .eh_frame_hdr
table (missing DWARF information).
Fix a bug occuring when parsing backtraces originated from abort().
Fix build missing dependencies issue.
2021-07-15 12:47:51 +08:00
Omar Chebib
b967dc0dbf espsystem: add support for RISC-V panic backtrace
Add .eh_frame and .eh_frame_hdr sections to the binary (can be
enabled/disabled within menuconfig). These sections are parsed
when a panic occurs. Their DWARF instructions are decoded and
executed at runtime, to retrieve the whole backtrace. This
parser has been tested on both RISC-V and x86 architectures.

This feature needs esptool's merge adjacent ELF sections feature.
2021-07-13 15:42:40 +08:00
Shu Chen
5e3689ae0f esp32h2: update esp_system and esp_hw_support to support esp32h2 2021-07-01 19:53:11 +08:00
Martin Vychodil
f27c9c5139 esp32c3: memprot API upgrade and test application
Closes IDF-2641
2021-04-12 13:44:11 +10:00
Angus Gratton
c22eb769e7 Merge branch 'bugfix/panic_instrprohibited' into 'master'
esp_system: fix instrprohibited panic backtrace regression

See merge request espressif/esp-idf!13023
2021-04-07 05:14:19 +00:00
Renz Bagaporo
75624c5355 esp_system: fix instrprohibited panic backtrace regression
First PC should have been ignored in the case of InstProhibited panic
when printing backtrace.
2021-04-05 22:05:27 +08:00
Angus Gratton
6b57f33858 Merge branch 'refactor/movements_from_target_components' into 'master'
Movement from target components 1

See merge request espressif/esp-idf!12482
2021-04-05 02:37:21 +00:00
Renz Bagaporo
301c48b6b2 esp_system: remove duplicate panic backtrace code 2021-04-01 07:22:57 +00:00
Renz Bagaporo
7d85c42e52 esp32: move brownout and cache err int setup 2021-03-31 19:13:03 +08:00
Renz Bagaporo
1efdcd69d9 xtensa: move out trax 2021-02-26 19:45:48 +08:00
Renz Bagaporo
7e0e91bf76 arch: move debug helpers 2021-02-26 13:34:29 +08:00
Renz Bagaporo
91a5770fd2 arch: move shared stack implementation to esp_system 2021-02-26 13:34:29 +08:00
Martin Vychodil
69096ddce5 Security: ESP32C3 memory protection feature (IRAM0/DRAM0)
Software support for PMS module.
Allows controlled memory access to IRAM (R/W/X) and DRAM0 (R/W)
On/locked by default, configurable in Kconfig (esp_system)

Closes https://jira.espressif.com:8443/browse/IDF-2092
2021-01-27 08:44:03 +01:00
Konstantin Kondrashov
d23c7690f2 esp32c3: Add UTs for reset_reason 2021-01-18 07:12:21 +08:00
Omar Chebib
c218f669ba panic on RISC-V: Take into account Merge Request comments 2020-12-31 15:46:17 +08:00
Omar Chebib
b6a450f824 panic: Add support for SoC-level panic
SoC level exceptions such as watchdog timer and cache errors are now supported.
Such exceptions now triggers a panic, giving more information about how
and when it happened.
2020-12-31 15:46:17 +08:00
Renz Bagaporo
4cc6b5571b esp_system: support riscv panic 2020-11-13 07:49:11 +11:00
Angus Gratton
420aef1ffe Updates for riscv support
* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
  longer signed/unsigned int).

Changes come from internal branch commit a6723fc
2020-11-13 07:49:11 +11:00