* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
longer signed/unsigned int).
Changes come from internal branch commit a6723fc
freertos: replace the freertos regular malloc to the specific malloc from xtensa port for tcb and stack allocations
freertos: avoid the cpu1 to unwind pended ticks when xTaskResumeAll is called insed of an ISR
freertos: protected the xPortGetCoreID functions with missing critical sections
tests: re-eanble the ignored tests that was failling before race-condition fixes
DISABLED_FOR_TARGETS macros are used
Partly revert "ci: disable unavailable tests for esp32s2beta"
This partly reverts commit 76a3a5fb48.
Partly revert "ci: disable UTs for esp32s2beta without runners"
This partly reverts commit eb158e9a22.
Partly revert "fix unit test and examples for s2beta"
This partly reverts commit 9baa7826be.
Partly revert "efuse: Add support for esp32s2beta"
This partly reverts commit db84ba868c.
Fixed problem with multiple mount/unmount for different devices.
Additional check for structure length included into the code.
Remove useless spaces.
Added initialization for reserved memory.
WL version 2 mark used sectors as 16 bytes block of bytes with CRC.
This changes required because old version did not worked with encryption.
Additional unit tests are implemented.
