It is possible to utilize some of the routines related to otadata
partition validation, after firmware image is downloaded to RAM. Hence
these routines should be part of app cpu cache, so that they do not
get overwritten by firmware.
Signed-off-by: Mahavir Jain <mahavir@espressif.com>
Allows OTA updates to be secured via signature checks, without requiring the overhead or complexity
of a full secure boot implementation.
Uses same signing mechanisms (build system and/or espsecure.py as Secure Boot).
Requires:
* [ ] More testing
* [ ] Documentation
Fixes mismatches where default Python interpreter may not match the most recently
installed sphinx-build wrapper script (if sphinx 2 & 3 both installed, pip will
clobber any previous copy of /bin/sphinx-build when it installs the new one.)
res was declared as “bool” so expression
((count == 0) ? A2D_SET_ONE_BIT : A2D_SET_MULTL_BIT)
always evaluated to “true”, and was implicitly converted to
A2D_SET_ONE_BIT.
Avoids growing the result of hardware bignum operations
(particularly for multiplication)
Fixes bugs where some Elliptic Curve operations fail or corrupt memory,
as they assume length of the number is never greater than the number of
non-zero limbs.
Includes some general refactoring to standardize terminology.
Closes https://github.com/espressif/esp-idf/issues/1556
Fixes TW12984
Adds test cases for both these issues.
1. after memory release MR merged, due to the get acl number condition is not completed, it will cause get acl number value incorrect
2. It may cause set Security Mode (BR/EDR) enable failed
1. change static emac-dma memory to dynamic
2. add esp_eth_deinit
3. modify ethernet example
4. add testcase for ethernet deinit function
5. GPIO0 could not output the 50MHz clock to PHY, so remove this configuration
1. new APIs: esp_mesh_get_subnet_nodes_num() and esp_mesh_get_subnet_nodes_list().
2. fix hard to find the parent during connect.
3. disable Wi-Fi channel switch function.
4. fix a typo of MESH_EVENT_NO_PARENT_FOUND.
esp_reset_reason_init would check for reset reason hint, and
unconditionally set RTC_RESET_CAUSE_REG (which is also
RTC_ENTRY_ADDR_REG) to hint value 0, i.e. 0x80000000. However the ROM
code treats this value as valid deep sleep wake stub entry point, and
tries to jump to it.
Clear RTC_RESET_CAUSE_REG only if it contained a valid reset reason
hint, and simply set the register value to 0 when doing so. Also add
a check to esp_get_deep_sleep_wake_stub function that deep sleep wake
stub entry address must be in IRAM.
Reported in https://esp32.com/viewtopic.php?f=13&t=6919.
