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https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
reset_reason: fix setting wake stub entry point to 0x80000000
esp_reset_reason_init would check for reset reason hint, and unconditionally set RTC_RESET_CAUSE_REG (which is also RTC_ENTRY_ADDR_REG) to hint value 0, i.e. 0x80000000. However the ROM code treats this value as valid deep sleep wake stub entry point, and tries to jump to it. Clear RTC_RESET_CAUSE_REG only if it contained a valid reset reason hint, and simply set the register value to 0 when doing so. Also add a check to esp_get_deep_sleep_wake_stub function that deep sleep wake stub entry address must be in IRAM. Reported in https://esp32.com/viewtopic.php?f=13&t=6919.
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@ -17,6 +17,8 @@
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#include "rom/rtc.h"
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#include "soc/rtc_cntl_reg.h"
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static void esp_reset_reason_clear_hint();
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static esp_reset_reason_t s_reset_reason;
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static esp_reset_reason_t get_reset_reason(RESET_REASON rtc_reset_reason, esp_reset_reason_t reset_reason_hint)
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@ -69,9 +71,12 @@ static esp_reset_reason_t get_reset_reason(RESET_REASON rtc_reset_reason, esp_re
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static void __attribute__((constructor)) esp_reset_reason_init(void)
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{
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esp_reset_reason_t hint = esp_reset_reason_get_hint();
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s_reset_reason = get_reset_reason(rtc_get_reset_reason(PRO_CPU_NUM),
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esp_reset_reason_get_hint());
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esp_reset_reason_set_hint(ESP_RST_UNKNOWN);
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hint);
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if (hint != ESP_RST_UNKNOWN) {
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esp_reset_reason_clear_hint();
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}
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}
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esp_reset_reason_t esp_reset_reason(void)
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@ -114,3 +119,8 @@ esp_reset_reason_t IRAM_ATTR esp_reset_reason_get_hint(void)
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}
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return (esp_reset_reason_t) low;
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}
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static void esp_reset_reason_clear_hint()
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{
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REG_WRITE(RTC_RESET_CAUSE_REG, 0);
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}
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@ -103,11 +103,14 @@ esp_deep_sleep_wake_stub_fn_t esp_get_deep_sleep_wake_stub(void)
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REG_WRITE(RTC_MEMORY_CRC_REG, stored_crc);
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_lock_release(&lock_rtc_memory_crc);
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if(stored_crc == calc_crc) {
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return (esp_deep_sleep_wake_stub_fn_t)REG_READ(RTC_ENTRY_ADDR_REG);
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} else {
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if(stored_crc != calc_crc) {
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return NULL;
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}
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esp_deep_sleep_wake_stub_fn_t stub_ptr = (esp_deep_sleep_wake_stub_fn_t) REG_READ(RTC_ENTRY_ADDR_REG);
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if (!esp_ptr_executable(stub_ptr)) {
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return NULL;
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}
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return stub_ptr;
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}
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void esp_set_deep_sleep_wake_stub(esp_deep_sleep_wake_stub_fn_t new_stub)
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@ -202,6 +202,74 @@ TEST_CASE("enter deep sleep on APP CPU and wake up using timer", "[deepsleep][re
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}
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#endif
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static void do_deep_sleep()
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{
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esp_sleep_enable_timer_wakeup(100000);
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esp_deep_sleep_start();
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}
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static void check_sleep_reset_and_sleep()
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{
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TEST_ASSERT_EQUAL(ESP_RST_DEEPSLEEP, esp_reset_reason());
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esp_sleep_enable_timer_wakeup(100000);
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esp_deep_sleep_start();
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}
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static void check_sleep_reset()
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{
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TEST_ASSERT_EQUAL(ESP_RST_DEEPSLEEP, esp_reset_reason());
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}
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TEST_CASE_MULTIPLE_STAGES("enter deep sleep more than once", "[deepsleep][reset=DEEPSLEEP_RESET,DEEPSLEEP_RESET,DEEPSLEEP_RESET]",
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do_deep_sleep,
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check_sleep_reset_and_sleep,
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check_sleep_reset_and_sleep,
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check_sleep_reset);
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static void do_abort()
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{
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abort();
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}
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static void check_abort_reset_and_sleep()
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{
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TEST_ASSERT_EQUAL(ESP_RST_PANIC, esp_reset_reason());
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esp_sleep_enable_timer_wakeup(100000);
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esp_deep_sleep_start();
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}
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TEST_CASE_MULTIPLE_STAGES("enter deep sleep after abort", "[deepsleep][reset=abort,SW_CPU_RESET,DEEPSLEEP_RESET]",
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do_abort,
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check_abort_reset_and_sleep,
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check_sleep_reset);
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static RTC_DATA_ATTR uint32_t s_wake_stub_var;
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static RTC_IRAM_ATTR void wake_stub()
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{
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esp_default_wake_deep_sleep();
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s_wake_stub_var = (uint32_t) &wake_stub;
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}
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static void prepare_wake_stub()
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{
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esp_set_deep_sleep_wake_stub(&wake_stub);
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esp_sleep_enable_timer_wakeup(100000);
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esp_deep_sleep_start();
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}
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static void check_wake_stub()
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{
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TEST_ASSERT_EQUAL(ESP_RST_DEEPSLEEP, esp_reset_reason());
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TEST_ASSERT_EQUAL_HEX32((uint32_t) &wake_stub, s_wake_stub_var);
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/* ROM code clears wake stub entry address */
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TEST_ASSERT_NULL(esp_get_deep_sleep_wake_stub());
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}
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TEST_CASE_MULTIPLE_STAGES("can set sleep wake stub", "[deepsleep][reset=DEEPSLEEP_RESET]",
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prepare_wake_stub,
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check_wake_stub);
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TEST_CASE("wake up using ext0 (13 high)", "[deepsleep][ignore]")
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{
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