Commit Graph

137 Commits

Author SHA1 Message Date
David Cermak
ecb419da2f soc: minor header fix typo and include of sdkconfig 2020-03-13 12:53:52 +01:00
Marius Vikhammer
37369a8a57 crypto: SHA and AES accelerator bring up for S2
Brings up, fixes and enables AES and SHA hardware acceleration.

Closes IDF-714
Closes IDF-716
2020-03-11 15:09:45 +08:00
morris
8b6c0947c7 soc: add hal api to set exception vector table base address 2020-03-06 20:23:30 +08:00
Angus Gratton
a9854f7085 Merge branch 'feature/rmt_clock_support_ref_tick' into 'master'
rmt: support ref tick && refactor unit test && re-enable unit test on ESP32-S2

Closes IDFGH-1715

See merge request espressif/esp-idf!7614
2020-03-06 15:03:52 +08:00
Michael (XIAO Xufeng)
8e348dcdcd Merge branch 'bugfix/fix_driver_ut_i2s' into 'master'
bugfix(i2s): fix driver ut i2s

See merge request espressif/esp-idf!6946
2020-03-06 11:55:07 +08:00
morris
0e4d82bc55 rmt: support REF_TICK as channel clock source
Closes https://github.com/espressif/esp-idf/pull/3952
2020-03-03 20:14:46 +08:00
morris
3c43264f83 rmt: add RMT_CHANNELS_NUM in rmt_caps.h 2020-03-03 20:14:45 +08:00
xiongyu
b3ae9fa978 bugfix(i2s): Updated ESP32-S2 ADC DAC support
* Delete the relevant codes of ADC DAC of ESP32-S2.
2020-03-03 12:59:30 +08:00
xiongyu
faf898b659 bugfix(i2s): fix driver ut i2s
* Add test support for ESP32S2

* Add loop back test

* Support chip internal connection, no external wiring required.

* Delete the relevant codes of PDM of ESP32-S2 ll layer.

* fix dac dma mode issue
2020-03-03 11:58:53 +08:00
Li Shuai
c796e14964 added psram stack check in backtrace 2020-03-03 11:52:29 +08:00
Angus Gratton
04ccb84b83 Merge branch 'feature/cpu_abstraction' into 'master'
CPU related operations abstraction

See merge request espressif/esp-idf!7301
2020-02-28 11:54:29 +08:00
Mahavir Jain
5f897fd33c Merge branch 'feat/secure_boot_v2_v41' into 'master'
feat/secure_boot_v2: Adding secure boot v2 support to ESP32-ECO3

Closes IDF-799

See merge request espressif/esp-idf!6778
2020-02-27 18:54:08 +08:00
Angus Gratton
d40c69375c bootloader: Add fault injection resistance to Secure Boot bootloader verification
Goal is that multiple faults would be required to bypass a boot-time signature check.

- Also strengthens some address range checks for safe app memory addresses
- Change pre-enable logic to also check the bootloader signature before enabling SBV2 on ESP32

Add some additional checks for invalid sections:

- Sections only partially in DRAM or IRAM are invalid
- If a section is in D/IRAM, allow the possibility only some is in D/IRAM
- Only pass sections that are entirely in the same type of RTC memory region
2020-02-27 14:37:19 +05:30
Michael (XIAO Xufeng)
7f8c827326 Merge branch 'bugfix/fix_driver_ut_pcnt' into 'master'
bugfix(pcnt): fix driver ut pcnt

See merge request espressif/esp-idf!6891
2020-02-27 11:29:28 +08:00
Renz Christian Bagaporo
d46989efa3 soc: remove param checking in cpu related abstractions 2020-02-27 07:15:15 +05:00
Renz Christian Bagaporo
f75cb2ef00 soc: change cpu stall, unstall, and reset core to not return values 2020-02-27 07:15:15 +05:00
Renz Christian Bagaporo
7f864d24ad soc: prefer assertions, disabling functions for cpu abstractions
Prefer assertions, making available functions only when caps support it
for cpu-related abstractions.

Changes cpu hal functions to stall, unstall, reset to not accept -1;
instead prefering macros that provide the same functionality.
2020-02-27 07:15:14 +05:00
Renz Christian Bagaporo
cefc71cdcd bootloader_support: mem-related initializations using cpu abstractions 2020-02-27 07:14:21 +05:00
Renz Christian Bagaporo
f3c6320ff6 soc: implement cpu utils in terms of cpu abstractions 2020-02-27 07:14:21 +05:00
Renz Christian Bagaporo
c9a51bfbb2 soc: create abstraction for cpu related operations 2020-02-27 07:14:19 +05:00
xiongyu
4d5c950770 bugfix(pcnt): fix driver ut pcnt
* Let `[ignore] case` return to freedom

  1) Because this test uses its own ISR, we need to release it with `esp_intr_free` instead of `pcnt_isr_service_uninstall`.

  2) `pcnt_evt_queue` needs to be created before the interrupt is registered and needs to be released at the end of each case.

* Add test support for ESP32S2

* Support chip internal connection, no external wiring required.
2020-02-26 16:52:53 +08:00
houwenxiang
c07e4c775d driver(uart): fix uart_set_line_inverse breaking change issue
closes https://github.com/espressif/esp-idf/issues/4581
2020-02-24 11:36:31 +08:00
xiongyu
61778d5b7c bugfix(i2s): fix adc output invert issue 2020-02-17 17:15:01 +08:00
Renz Christian Bagaporo
16e0c93e40 ci: solve public headers errors 2020-02-11 14:30:42 +05:00
Renz Christian Bagaporo
b675df4b08 soc: use include_next for including common touch sensor hal header 2020-02-11 14:30:42 +05:00
Renz Christian Bagaporo
1f2e2fe8af soc: separate abstraction, description and implementation 2020-02-11 14:30:42 +05:00
Andrei Gramakov
4e8b4b9e49 soc: add USB peripheral register definitions, hal level, reg map, etc 2020-02-10 08:33:39 +00:00
Ivan Grokhotkov
4bfd0b961b Merge branch 'fix/spi_on_esp32s2' into 'master'
spi: support esp32s2

See merge request espressif/esp-idf!7432
2020-02-09 19:45:16 +08:00
Angus Gratton
11fac8637a docs: Resolve doxygen & Sphinx warnings 2020-02-07 16:37:45 +11:00
Michael (XIAO Xufeng)
7026087dc0 spi: support esp32s2 2020-01-26 17:24:12 +08:00
Ivan Grokhotkov
caef7ad9f2 esp32, esp32s2beta: move brownout.c to esp_common 2020-01-23 13:44:19 +01:00
Ivan Grokhotkov
70752baba4 esp32s2: add brownout detector support
1. add brownout detector HAL for esp32 and esp32s2
2. enable brownout reset for esp32 rev. 1 and above
3. add approximate brownout detector levels for esp32s2
2020-01-23 13:44:19 +01:00
morris
e30cd361a8 global: rename esp32s2beta to esp32s2 2020-01-22 12:14:38 +08:00
Felipe Neves
73592d9bc4 spin_lock: added new spinlock interface and decoupled it from RTOS
spin_lock: cleaned-up port files and removed portmux files

components/soc: decoupled compare and set operations from FreeRTOS

soc/spinlock: filled initial implementation of spinlock refactor

It will decouple the spinlocks into separated components with not depencences of freertos
an similar interface was provided focusing the readabillity and maintenance, also
naming to spinlocks were adopted. On FreeRTOS side the legacy portMUX macros
gained a form of wrapper functions that calls the spinlocks component thus
minimizing the impact on RTOS side.

This feature aims to close IDF-967

soc/spinlock: spinlocks passed on unit test, missing test corner cases

components/compare_set: added better function namings plus minor performance optimization on spinlocks

soc/spinlock: code reordering to remove ISC C90 mix error

freertos/portmacro: gor rid of critical sections multiline macros, placed inline functions instead

soc/spinlock: improved spinlock performance from internal RAM

For cases where the spinlock is executed from IRAM, there is no
need to check where the spinlock object is placed on memory,
removing this checks caused a great improvement on performance.
2020-01-22 06:20:34 +08:00
morris
1c2cc5430e global: bring up esp32s2(not beta) 2020-01-16 17:41:31 +08:00
Angus Gratton
c7738f24fc Merge branch 'bugfix/ledc_driver_enums' into 'master'
driver: Avoid possible accidental mismatch between ledc_clk_src_t & ledc_clk_cfg_t enum

See merge request espressif/esp-idf!7021
2020-01-10 15:34:43 +08:00
Darian Leung
a049e02d96 can: Refactor CAN to use HAL and LowLevel layers
The following commit refactors the CAN driver such that
it is split into HAL and Lowlevel layers. The following
changes have also been made:

- Added bit field members to can_message_t as alternative
  to message flags. Updated examples and docs accordingly
- Register field names and fields of can_dev_t updated
2020-01-09 16:13:51 +08:00
Angus Gratton
7dc7557aa9 soc: Fix esp_ptr_executable() for single core ESP32 config & cache memory
In single core mode, APP CPU cache region is added to the available range.
2020-01-03 17:31:40 +11:00
Ivan Grokhotkov
d9534b3d6a soc: fix backtraces containing ROM functions
esp_ptr_executable would return false for pointers to ROM, which would
interrupt the backtrace. This makes ROM ranges recognized as
executable.
2020-01-02 18:42:46 +01:00
Ivan Grokhotkov
e4d45608d3 soc: add ledc_caps.h, replace target-based ifdefs with caps-based 2019-12-28 20:33:21 +00:00
kewal shah
eec8212237 add simplified API to set UART threshold values for RX FIFO full and TX FIFO empty 2019-12-16 20:26:04 +00:00
Angus Gratton
435dd546cc driver: Avoid possible accidental mismatch between ledc_clk_src_t & ledc_clk_cfg_t enum
ledc_types.h includes two similar enums, ledc_clk_src_t & ledc_clk_cfg_t. Latter was added in
ESP-IDF v4.0.

The two enums do different things but there are two similar names: LEDC_REF_TICK / LEDC_USE_REF_TICK
and LEDC_APB_CLK / LEDC_USE_APB_CLK.

Because C will accept any enum or integer value for an enum argument, there's no easy way to check
the correct enum is passed without using static analysis.

To avoid accidental errors, make the numeric values for the two similarly named enums the same.,

Noticed when looking into https://github.com/espressif/esp-idf/issues/4476
2019-12-16 19:43:11 +11:00
Michael (XIAO Xufeng)
0ec08ca21b sdio_slave: support HAL layer 2019-12-13 18:33:15 +08:00
houwenxiang
aac935ec81 bugfix(i2c): fix I2C driver breaking change issue.
1. Fixed I2C driver breaking change issue.
    2. Add I2C UT test case.
2019-12-04 15:51:36 +08:00
Wang Jia Lin
1ffcb54444 Merge branch 'bugfix/fix_esp32-s2_rtc_io_issue' into 'master'
bugfix(gpio): fix esp32 s2 rtc io issue and gpio testcase issues

See merge request espressif/esp-idf!6832
2019-12-03 11:17:41 +08:00
Renz Christian Bagaporo
e6ad330018 ble_mesh_wifi_coexist example: Disable Wi-Fi RX IRAM optimisation
Otherwise IRAM usage is too high in this example.
2019-11-28 09:20:00 +08:00
Fu Zhi Bo
3a468a1ffd Refactor the touch sensor driver 2019-11-27 20:08:44 +08:00
xiongyu
af4c455417 bugfix(gpio):fix esp32 s2 rtc io issue
* Modify the function implementation of ESP32-S2 RTC GPIO
  On ESP32 those PADs which have RTC functions must set pullup/down/capability via RTC register.
  On ESP32-S2, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers.
* Add ESP32-S2 support of unit test
* Modify the pull-up test of unit test
* Modify the interrupt test of unit test
* Modify input and output mode test of unit test
2019-11-27 17:18:20 +08:00
Angus Gratton
91b7a7beaf Merge branch 'bugfix/timer_intr_status_get' into 'master'
bugfix(timer): fix get intr status function

See merge request espressif/esp-idf!6807
2019-11-27 09:13:16 +08:00
chenjianqiang
bcfe684951 bugfix(timer): add a macro to control making the XTAL related functions 2019-11-26 12:39:46 +00:00