Marius Vikhammer
cfbe0a035b
esp-rom: add missing spi-flash ROM API functions
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Added symbols for the SPI flash API which we export from the ROM interface,
deleted functions which are not exported.
Closes https://github.com/espressif/esp-idf/issues/1212
2022-08-08 16:34:10 +08:00
Jakob Hasse
f8b5ed5d6c
refactor (soc, esp_rom)!: removed target-specific ROM dependencies
2022-07-05 13:57:58 +08:00
Wu Zheng Hui
b98622c624
efuse: update efuse name
2022-05-28 22:03:16 +08:00
laokaiyao
7da023ceae
i2c: support esp32c2
2022-02-23 15:19:37 +08:00
Cao Sen Miao
d397464fc4
spi_flash: refactor spi_flash.h to esp_rom_spiflash.h but keep the content in spi_flash.h
2021-12-30 14:12:31 +08:00
Cao Sen Miao
b0decda1e3
bootloader: move bootloader flash support to isolate folders
2021-12-30 14:05:12 +08:00
Cao Sen Miao
3a4db97cec
spi_flash: move patch files to common rom patch folder
2021-12-30 14:05:12 +08:00
Cao Sen Miao
3dd1cfea18
spi_flash: refactor spi_flash.h to decline duplicated code
2021-12-30 14:05:12 +08:00
Mahavir Jain
f667b1039b
Fix copyright headers for few include files
2021-11-30 22:25:33 +05:30
lovyan03
cb91b51c52
bugfix: Conflicting declaration error with include<esp_efuse.h>, and Unified secure_boot.h include guard to "pragma once".
2021-11-30 15:46:49 +09:00
Jiang Jiang Jian
3b48b7e663
Merge branch 'Fix/update_reset_reason' into 'master'
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update reset reason for c3/s3/h2
See merge request espressif/esp-idf!14747
2021-09-18 07:03:50 +00:00
Mahavir Jain
d9fdb9dc3f
esp_rom: remove "newlib.h" header
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We found conflict in "sizeof(time_t)" due to inclusion of this
header over toolchain specific "newlib.h".
Moreover, there are no users for this header and implementation
for API is also not available in ROM. Hence removing it.
2021-08-27 14:33:05 +05:30
wuzhenghui
f913a10a22
update reset reason for c3/s3/h2
2021-08-13 17:45:53 +08:00
morris
1560d6f1ba
soc: add reset reasons in soc component
2021-07-13 10:45:38 +08:00
Anton Maklakov
b46b50eaa6
newlib: Add ESP_ROM_HAS_RETARGETABLE_LOCKING capability for C3 and S3 chips
2021-06-07 12:53:45 +07:00
Michael (XIAO Xufeng)
a0d13a31ec
uart: fix misleading files for UART2
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Includes: header files, ld files and clk.c
ESP32-C3 only have UART0 and UART1.
2021-04-27 17:40:19 +08:00
KonstantinKondrashov
95564b4687
secure_boot: Secure Boot V2 verify app signature on update (without Secure boot)
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- ESP32 ECO3, ESP32-S2/C3/S3
2021-03-15 12:30:20 +00:00
morris
0f5d1c1c46
rtc: supported disable rom log temporarily
2021-02-22 20:56:43 +08:00
KonstantinKondrashov
43ebb8ea61
efuse: Updates description of uart_print_control efuse
2021-02-08 18:02:55 +08:00
KonstantinKondrashov
98f726fa4b
bootloader/esp32c3: Adds secure boot (not yet supported)
2021-01-19 20:51:13 +08:00
Chen Jian Xing
5b44295cb9
esp_wifi: fix esp32c3 code issues
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1. enable wifi clk and rm dport header
2.syn phy_init_data.h from esp32
2021-01-10 16:16:28 +08:00
Angus Gratton
a5aac93051
esp_rom: Small changes for esp32c3 support
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Updated from internal commit 6d894813
2020-12-24 13:40:01 +11:00
Angus Gratton
b68094199f
esp_rom: Add initial ESP32-C3 support
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From internal commit 7761d6e8
2020-11-30 11:12:56 +11:00