Using xxx_periph.h in whole IDF instead of xxx_reg.h, xxx_struct.h, xxx_channel.h ... .
Cleaned up header files from unnecessary headers (releated to soc/... headers).
1. separate rom include files and linkscript to esp_rom
2. modefiy "include rom/xxx.h" to "include esp32/rom/xxx.h"
3. Forward compatible
4. update mqtt
Support for HSPI to output clock for 4M SPIRAM introduced regression
in clock configuration affecting SPIRAM access with 80MHz clock. This
commit fixes the issue.
When 32k XTAL was selected as clock source, if the first calibration
attempt failed, the code would fall back to 150kHz internal clock.
Calibration with the internal clock will always succeed.
Therefore `wait` would always be either 0 or 1. Based on this, some
code in this routine can be eliminated.
Fixed the error division on zero.
Also fixed range CONFIG_ESP32_RTC_CLK_CAL_CYCLES in Kconfig.
Fixed a overflow error by TIMG in the function rtc_clk_cal_internal. This error was due to a limit in values TIMG_RTC_CALI_MAX=0x7FFF (to write the slowclk_cycles) and TIMG_RTC_CALI_VALUE=0x1FFFFFF (to read xtal_cycles). Added assert finctions.
Closes https://github.com/espressif/esp-idf/issues/2147
If the RTC crystal is bad or has no matched capacitance, then you do not need to start such the crystal. It is necessary to determine this case, output an error (about impossibility to start from the oscillator) and start from the internal RC of the chain.
Reduced the default value of the number of bootstrap cycles. Because we can oscillating the oscillator which then stops. (in Kconfig). Changed from 100 to 5.
The number of calibration cycles has been increased. It is the main criterion for estimating the launch of an oscillator. A large increase leads to an increase in the load time, as well as the stability of recognition of this case. (in Kconfig).
Changed from 1024 to 3000.
1. External 32kHz crystal is started for too long or it may not start at all. It is often observed at the first start.
2. At the first start, it is possible that the crystal did not start. And the recorded period was recorded as 0. Which led to a division error by zero during the transition to the deep sleep mode (Maybe somewhere else).
3. Added a unit test to test a new method of oscillation an external crystal.
4. Added a new method of oscillating of an external crystal. The legs of the crystal are fed with a 32 kHz frequency.
The new method eliminates these errors.
Added unit test: `\esp-idf\components\soc\esp32\test\test_rtc_clk.c`: `make TEST_COMPONENTS=soc`
- 8 Test starting external RTC crystal. Will pass.
`Bootstrap cycles for external 32kHz crystal` - is specified in the file Kconfig by default 100.
QA tested a new method of oscillation the crystal on 25 boards. The supply of square waves on the crystal showed a 100% result in contrast to the previous method of launching the crystal. After the tests, the old method was deleted.
Closes TW19143
All peripheral clocks are default enabled after chip is powered on.
When CPU starts, if reset reason is CPU reset, disable those clocks
that are not enabled before reset. Otherwise, disable all those
useless clocks.
These peripheral clocks must be enabled when the peripherals are
initialized and disabled when they are deinitialized.
Small changes to clock calibration value will cause increasing errors
the longer the device runs. Consider the case of deep sleep, assuming
that RTC counter is used for timekeeping:
- before sleep:
time_before = rtc_counter * calibration_val
- after sleep:
time_after = (rtc_counter + sleep_count) * (calibration_val + epsilon)
where 'epsilon' is a small estimation error of 'calibration_val'.
The apparent sleep duration thus will be:
time_after - time_before = sleep_count * (calibration_val + epsilon)
+ rtc_counter * epsilon
Second term on the right hand side is the error in time difference
estimation, it is proportional to the total system runtime (rtc_counter).
To avoid this issue, this change makes RTC_SLOW_CLK calibration value
persistent across restarts. This allows the calibration value update to
be preformed, while keeping time after update same as before the update.
Even though RTC_CLK_CONFIG_DEFAULT correctly had RTC_FAST_FREQ_8M as the
fast clock, the bootloader modified fast_freq field to the currently
selected RTC_FAST_CLK (so that the clock choice is not affected by the
bootloader). The application startup code never switched to 8M clock,
which caused the default (XTAL/4) to be used as RTC_FAST_CLK. This had
caused a number of issues, such as touch pads not working in deep sleep.
Fixes https://github.com/espressif/esp-idf/issues/542.
Ref TW12053.
- RTC_CNTL_SLOWCLK_FREQ define is removed; rtc_clk_slow_freq_get_hz
function can be used instead to get an approximate RTC_SLOW_CLK
frequency
- Clock calibration is performed at startup. The value is saved and used
for timekeeping and when entering deep sleep.
- When using the 32k XTAL, startup code will wait for the oscillator to
start up. This can be possibly optimized by starting a separate task
to wait for oscillator startup, and performing clock switch in that
task.
- Fix a bug that 32k XTAL would be disabled in rtc_clk_init.
- Fix a rounding error in rtc_clk_cal, which caused systematic frequency
error.
- Fix an overflow bug which caused rtc_clk_cal to timeout early if the
slow_clk_cycles argument would exceed certain value
- Improve 32k XTAL oscillator startup time by introducing bootstrapping
code, which uses internal pullup/pulldown resistors on 32K_N/32K_P
pins to set better initial conditions for the oscillator.
