bt component: Fix memory leak while using gatt server
- fix memory leak while creating attribute table
- fix memory leak while deleting service
See merge request !656
Introduce soc component, add source of rtc_clk and rtc_pm libraries
This MR adds parts of the RTC library source code (initialization, clock selection functions, sleep functions). WiFi-related power management functions are kept inside the precompiled library. Most of RTC library APIs have been renamed.
Default CPU frequency option in Kconfig is set to 160MHz, pending qualification of 240MHz mode at high temperatures.
Register header files are moved into the new soc component, which will contain chip-specific header files and low-level non-RTOS-aware APIs (such as rtc_ APIs). Some of the files from ESP32 component were also moved: cpu_util.c, brownout.c, and the corresponding header files. Further refactoring of ESP32 component into more meaningful layers (chip-specific low level functions; chip-specific RTOS aware functions; framework-specific RTOS-related functions) will be done in future MRs.
See merge request !633
Bugfix/flash busy check wait spi idle
This branch moves some ROM SPI flash driver to IDF to fix bug in Wait_SPI_Idle() function.
Also it applies code style rules of IDF to integrated ROM driver sources.
See merge request !584
Even if firmware is compiled without CONFIG_FLASH_ENCRYPTION_ENABLED
Rayionale: CONFIG_FLASH_ENCRYPTION_ENABLED controls whether boot loader
generates keys for encryption or not, but flash encryption can be
configured externally. With this change, it's possible to have boot
loader not generate keys but still have encryption working.
Also fix use of it->part
1) fixed SPI_read_status: added check for flash busy flag in matrix mode
2) fixed SPI_page_program: enable write before writing data to SPI FIFO
3) SPI flash ROM funcs replacement is controlled via menuconfig option
CI: add reset between running each unit test cases
Unit test is designed to detect bug **within** each test case. Therefore we'll reset between each case to provide a clean context. We will later add stress cases to run unit test cases together to detect potential bugs.
See merge request !636
esp32: initialize cross-core interrupt in single core mode
The software interrupt originally used as the cross-core interrupt is
now also used to yield from a FreeRTOS critical section; therefore it
must be initialized for single core mode as well.
Fixes https://github.com/espressif/esp-idf/issues/496
See merge request !640
fix warnings generated by ESP_ERROR_CHECK(variable) in release builds
This uses the same pattern as “assert” in release builds to silence the
warning. At the same time, we make sure that if a statement is wrapped
into ESP_ERROR_CHECK, it is executed in release build as well.
Fixes https://github.com/espressif/esp-idf/issues/497
See merge request !641
This uses the same pattern as “assert” in release builds to silence the
warning. At the same time, we make sure that if a statement is wrapped
into ESP_ERROR_CHECK, it is executed in release build as well.
The software interrupt originally used as the cross-core interrupt is
now also used to yield from a FreeRTOS critical section; therefore it
must be initialized for single core mode as well.
Fixes https://github.com/espressif/esp-idf/issues/496
esp32: RWDT is used to reboot system in case of panic handler crash
This branch uses RWDT to reboot system in case of panic handler crash.
See merge request !625
Feature/btdm uart hci
1. support UART HCI, devolper need not to make a bridge between VHCI and UART.
2. fix bug of rand/srand called in ISR.
3. fix bug of BLE rx packets may cause assert.
See merge request !626
component/bt : modify alarm APIs to be safely accessible from multiple tasks
Improve the osi_alarm module to make the alarm APIs become thread safe.
See merge request !570
1. support UART HCI, devolper need not to make a bridge between VHCI and UART.
2. fix bug of rand/srand called in ISR.
3. fix bug of BLE rx packets may cause assert.
lwip: implement lwip critical session with mutex
Currently lwip critical session is based on interrupt, now replace it with mutex
See merge request !595
spi_flash: fix race condition in s_flash_op_complete access
Flash operation complete flag was cleared by the CPU initiating flash operation. If the other core was running an ISR, then IPC task could be late to enter the loop to check `s_flash_op_complete` by the time next flash operation started. This would cause a deadlock, as the IPC task would still be waiting for `s_flash_op_complete` to be set (which was already cleared by the next flash operation), while the flash operation task would be blocked waiting for IPC task to set `s_flash_op_can_start`.
If the flag is cleared on the CPU waiting on this flag, then the race condition can not happen.
See merge request !615
