Commit Graph

19 Commits

Author SHA1 Message Date
Jiang Jiang Jian
ea59318583 Merge branch 'bugfix/fix_phy_calibration_error_for_c2_v5.0' into 'release/v5.0'
fix(phy): fix phy calibration error in none mode for 26MHz XTAL ESP32C2 (backport v5.0)

See merge request espressif/esp-idf!26556
2023-11-02 15:12:06 +08:00
zhangyanjiao
49f02b3b43 fix(phy): Update phy lib to master 2023-11-01 17:56:48 +08:00
liuning
728cd2489a feat(esp_wifi): support ps-none mode at coexist 2023-10-31 20:38:17 +08:00
liuning
eb61f5835a esp_wifi: add protection for mac reset (backport 5.0) 2022-10-31 17:55:03 +08:00
Darian Leung
0c8ac295c5 riscv: Remove redundant riscv_interrupts.h header
This commit removes the riscv_interrupts.h header is it has become redundant. The previously
exposed API has been handled as follows:

- "riscv_interrupt_enable()" and "riscv_interrupt_disable()" have been removed. These functions
  were declarations only and never had any implementation.
- "riscv_global_interrupts_enable()" and "riscv_global_interrupts_disable()" renamed to
  "rv_utils_intr_global_enable()" and "rv_utils_intr_global_disable()" respectively and now
  placed in rv_utils.h
2022-09-19 14:19:11 +08:00
Li Shuai
b9a667b9f8 1. Wi-Fi: update tsf tick interval when lpclk is modified
2. Move register_lpclk_callback to coexistence
2022-08-15 21:16:11 +08:00
wangmengyang
1d55f12c2d component/bt: reset Bluetooth hardware during controller inititalization on ESP32-C3/ESP32-S3
1. Rename MACROs SYSTEM_WIFI_RST_EN register bit fields to be more recognizable
2. reset Bluetooth baseband and clock bits to fix the issue of task watchdog triggered during controller initialization due to invalid hardware state
2022-07-06 16:23:48 +08:00
Anton Maklakov
282c9ab1e1 esp_wifi: make int types consistent 2022-05-29 18:42:09 +08:00
liuning
e0decf4839 esp_wifi: fully support connectionless traffic with ps and coex 2022-05-28 08:52:55 +00:00
Sudeep Mohanty
a9fda54d39 esp_hw_support/esp_system: Re-evaluate header inclusions and include directories
This commit updates the visibility of various header files and cleans up
some unnecessary inclusions. Also, this commit removes certain header
include paths which were maintained for backward compatibility.
2022-03-07 11:18:08 +05:30
morris
ef00bd59dc esp_rom: extract int matrix route and cpu ticks getter 2022-02-09 13:52:20 +08:00
Cao Sen Miao
eddc196081 esp_clk: refactor target/clk.h to private/esp_clk.h 2021-11-26 14:56:30 +08:00
morris
16677b0d3c global: make periph enable/disable APIs private
peripheral enable/disable usually should be managed by driver itself,
so make it as espressif private APIs, not recommended for user to use it
in application code.
However, if user want to re-write the driver or ports to other platform,
this is still possible by including the header in this way:
"esp_private/peripheral_ctrl.h"
2021-11-08 10:37:47 +08:00
Chen Yu Dong
f0a96e586d pre-commit fix 2021-10-12 14:05:19 +08:00
alex.li
26d8b7ee17 Add HW external coexist api.
Simplify the external coex flow.

And replace gpio of driver interface with hal one.
2021-10-12 14:05:14 +08:00
Xia Xiaotian
ce8b996ca0 esp_wifi: synchronize Wi-Fi adapter between different chips
Support preferring to allocate Wi-Fi memory from PSRAM on ESP32-S3

Support Wi-Fi TX cache buffer on ESP32-S3
2021-02-26 11:29:50 +08:00
Marius Vikhammer
04df1f3a42 CI: enable example builds for C3
Enables building C3 examples in CI.

Fixes related warnings/errors and disables examples that cannot run.
2021-02-09 12:04:02 +08:00
ninh
659d805411 esp_wifi: light sleep optimization 2021-01-18 15:31:03 +08:00
Chen Jian Xing
5b44295cb9 esp_wifi: fix esp32c3 code issues
1. enable wifi clk and rm dport header
2.syn phy_init_data.h from esp32
2021-01-10 16:16:28 +08:00