Commit Graph

16 Commits

Author SHA1 Message Date
Yorick van Pelt
65707cfb41 esp_eth_mac_esp32: optionally setup SMI GPIO's
This enables passing smi_mdio_gpio_num = -1 to disable that signal

Merges https://github.com/espressif/esp-idf/pull/5903
2020-09-25 19:59:41 +08:00
Jakob Hasse
f7f46905ec esp_eth: moved extern "C" after includes 2020-09-08 17:44:57 +08:00
morris
4e38aab1b0 ethernet: support flow control for esp32 emac 2020-08-10 18:54:25 +08:00
morris
1184366387 ethernet: support pin emac task to core 2020-05-29 17:51:37 +08:00
morris
6020d6a5d4 ethernet: esp_eth_stop API should stop emac hardware 2020-05-13 15:58:42 +08:00
morris
9e59be1aab ethernet: add enc28j60 example 2020-02-10 12:56:14 +08:00
Henry Gilbert
eda07acc81 Add ENC28J60 Ethernet Driver
Merges https://github.com/espressif/esp-idf/pull/4435
2020-02-10 12:56:14 +08:00
morris
5ad0bdd8db ethernet: work with cache disabled
add ETH_MAC_FLAG_WORK_WITH_CACHE_DISABLE flag, make ethenret driver
possible to work when cache disabled

Closes https://github.com/espressif/esp-idf/issues/4406
2020-01-19 16:25:24 +08:00
morris
c3ee156df0 ethernet: move netif glue && add ref counter
1. move netif glue into single file
2. add reference counter for Ethernet driver
2019-11-27 10:36:32 +08:00
suda-morris
05d71319de ethernet: add gpio number into config structure 2019-11-20 10:36:45 +08:00
suda-morris
f3d0429a9e ethernet: add reference counter for mac and phy 2019-11-20 10:36:45 +08:00
Ivan Grokhotkov
31dac92e5f ethernet: support OpenCores ethernet MAC
OpenCores Ethernet MAC has a relatively simple interface, and is
already supported in QEMU. This makes it a good candidate for enabling
network support when running IDF apps in QEMU, compared to the
relatively more complex task of writing a QEMU model of ESP32 EMAC.

This driver is written with QEMU in mind: it does not implement or
handle things that aren't implemented or handled in the QEMU model:
error flags, error interrupts. The transmit part of the driver also
assumes that the TX operation is done immediately when the TX
descriptor is written (which is the case with QEMU), hence waiting for
the TX operation to complete is not necessary.

For simplicity, the driver assumes that the peripheral register
occupy the same memory range as the ESP32 EMAC registers, and the
same interrupt source number is used.
2019-10-13 17:05:26 +02:00
suda-morris
13c128fd31 Ethernet: optimize and bugfix
1. simplify deallocate in esp_eth_mac_new_esp32, esp_eth_mac_new_dm9051
2. remove blocking operation in os timer callback
3. check buffer size in ethernet receive function
2019-10-11 12:15:17 +08:00
suda-morris
546ac64a9e ethernet: update spi-ethernet api 2019-09-19 09:41:21 +00:00
suda-morris
cb42c29252 ethernet: support dm9051
1. move resource allocation from xxx_init to xxx_new
2. fix enabling tx checksum insertion by mistake
3. iperf example: enlarge max arguments
4. add examples for spi-ethernet

Closes https://github.com/espressif/esp-idf/issues/3715
Closes https://github.com/espressif/esp-idf/issues/3711
2019-07-04 19:38:13 +08:00
suda-morris
90c4827bd2 add esp_eth component 2019-06-26 10:19:23 +08:00