alex/esp-idf
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35,392 Commits 20 Branches 148 Tags 384 MiB
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1341 Commits

Author SHA1 Message Date
Mahavir Jain
e18fd01d0d Merge branch 'fix/pmp_idcache_reg_prot' into 'master' 
fix(esp_hw_support): Fix the I/DCACHE region PMP protection

See merge request espressif/esp-idf!28525
 2024-02-29 21:39:11 +08:00
Mahavir Jain
7adbc9cf4b Merge branch 'fix/fix_key_manager_clock_changes' into 'master' 
fix(hal): Fix Key Manager clock changes

See merge request espressif/esp-idf!28890
 2024-02-29 21:38:18 +08:00
gaoxu
f9109beda2 feat(uart): add HP/LP uart support on ESP32C5 2024-02-29 14:12:51 +08:00
Aditya Patwardhan
4636ef946b fix(esp_hw_support): Update key manager locking mechanism 2024-02-29 12:00:30 +08:00
Aditya Patwardhan
3ffb811d18 fix(hal): Fix Key Manager clock changes 2024-02-29 12:00:30 +08:00
Laukik Hase
366e4ee944
refactor(esp_hw_support): Remove redundant PMP entry for ROM region 
- The ROM text and data sections share the address range
    (see SOC_I/DROM_MASK_LOW - SOC_I/DROM_MASK_HIGH).
  - Initially, we had two PMP entries for this address range - one marking the
    region as RX and the other as R.
  - However, the latter entry is redundant as the former locks the PMP settings.
  - We can divide the ROM region into text and data sections later when we
    define boundaries marking these regions from the ROM.
 2024-02-28 10:54:38 +05:30
Laukik Hase
ff839be31d
fix(esp_hw_support): Fix the I/DCACHE region PMP protection 2024-02-28 10:54:37 +05:30
Song Ruo Jing
98d9f04b00 feat(gdma): add GDMA support for ESP32C5 2024-02-28 12:38:02 +08:00
Wu Zheng Hui
f3b95059f9 Merge branch 'bugfix/fix_sleep_cache_safe_assertion' into 'master' 
fix(esp_hw_support): fix cache safe check function

See merge request espressif/esp-idf!29246
 2024-02-28 10:50:52 +08:00
morris
f0342d6b59 feat(dw_gdma): support change link list item connection 
by dw_gdma_lli_set_next
 2024-02-27 17:49:04 +08:00
wuzhenghui
4e731e8612 fix(esp_hw_support): fix cache safe check function 2024-02-27 17:29:24 +08:00
Jiang Jiang Jian
c7a02cbe55 Merge branch 'c6_auto_dbias_master_hsq' into 'master' 
ESP32C6: Active & sleep dbg and dbias get from efuse to fix the voltage

See merge request espressif/esp-idf!27696
 2024-02-22 19:12:28 +08:00
KonstantinKondrashov
eeeebdf1cd fix(esp_hw_support): Fix esp_intr_free when taks has no core affinity 
Closes https://github.com/espressif/esp-idf/issues/12608
 2024-02-21 14:54:32 +08:00
fl0wl0w
90d1dcfd76 feat(freertos): Introduced new Kconfig option CONFIG_FREERTOS_NUMBER_OF_CORES 
This commit replaces the use of portNUM_PROCESSORS and configNUM_CORES
macros in all of ESP-IDF. These macros are needed to realize an SMP
scenario by fetching the number of active cores FreeRTOS is running on.
Instead, a new Kconfig option, CONFIG_FREERTOS_NUMBER_OF_CORES, has been
added as a proxy for the FreeRTOS config option, configNUMBER_OF_CORES.
This new commit is now used to realize an SMP scenario in various places
in ESP-IDF.

[Sudeep Mohanty: Added new Kconfig option CONFIG_FREERTOS_NUMBER_OF_CORES]

Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
 2024-02-09 09:11:28 +01:00
Song Ruo Jing
d556fee5c4 Merge branch 'feature/esp32c5_clock_preliminary_support' into 'master' 
Feature/esp32c5 clock preliminary support

See merge request espressif/esp-idf!28808
 2024-02-08 11:54:35 +08:00
Song Ruo Jing
95133c179f feat(clk): preliminary clock tree support for ESP32C5 2024-02-07 14:38:15 +08:00
Song Ruo Jing
dce27c3b09 change(clk_tree): add LP_DYN_FAST_CLK to soc_module_clk_t 2024-02-07 14:37:48 +08:00
Marius Vikhammer
2d8d87b396 fix(system): fixed rtc_sleep not being placed in IRAM 2024-02-07 09:47:23 +08:00
laokaiyao
ea14b24048 ci(esp32c5): fix the build of the template app 2024-02-05 12:39:35 +08:00
laokaiyao
c0c6af99e9 fix(esp32c5): fixed the lack of crosscore ll on c5 2024-02-05 12:39:35 +08:00
hongshuqing
35918b89a9 feat(pmu): set fix voltage to different mode for esp32c6 & c6 modify brownout rst2 2024-02-04 14:13:23 +08:00
wuzhenghui
247b4e0574
change(esp_hw_support): collect retention link priority definition 2024-02-02 11:21:44 +08:00
wuzhenghui
0c2f811ca8
feat(esp_hw_support): support gdma register context sleep retention 2024-02-02 11:21:40 +08:00
Michael (XIAO Xufeng)
35516652ad Merge branch 'doc/spi_flash_32bit_addr' into 'master' 
doc(spi_flash): reorganize optional features

See merge request espressif/esp-idf!27808
 2024-01-29 18:16:59 +08:00
Michael (XIAO Xufeng)
6dbb3059f9 Merge branch 'h2_auto_dbias_master_hsq' into 'master' 
ESP32H2: Active & sleep dbias get from efuse to fix the voltage

See merge request espressif/esp-idf!27483
 2024-01-29 10:16:15 +08:00
Konstantin Kondrashov
4daaa94593 Merge branch 'feature/cleanup_rom_efuse_header' into 'master' 
change(all): Clearing unused efuse rom headers

See merge request espressif/esp-idf!27109
 2024-01-26 20:30:44 +08:00
Song Ruo Jing
cf93777077 refactor(rtc): move soc/rtc.h from soc to esp_hw_support component 
Deprecated rtc_xtal_freq_t, replaced with soc_xtal_freq_t defined in
clk_tree_defs.h in soc component.
 2024-01-25 19:15:33 +08:00
Wu Zheng Hui
55f04b3326 Merge branch 'feature/clean_up_retention_context_definitions' into 'master' 
refactor(esp_hw_support): move sleep retention context definition to soc target folder

Closes PM-10

See merge request espressif/esp-idf!26753
 2024-01-24 20:24:02 +08:00
hongshuqing
0b79d9bf4c feat(pmu): set fix voltage to different mode for esp32h2 
h2 remove include
 2024-01-24 13:11:41 +08:00
Mahavir Jain
09c9001895 Merge branch 'feature/add_key_manager_hw_support' into 'master' 
Feature/add key manager hw support

Closes IDF-7925 and IDF-8041

See merge request espressif/esp-idf!26328
 2024-01-23 17:11:05 +08:00
Song Ruo Jing
9ba5f4dab2 Merge branch 'feature/esp32p4_dma2d_support' into 'master' 
feat(esp_hw_support/dma2d): Add 2D-DMA support on ESP32P4

Closes IDF-6498

See merge request espressif/esp-idf!25527
 2024-01-23 15:19:25 +08:00
wuzhenghui
f3f12e973c
refactor(esp_hw_support): separate different chip system peripheral regs context defs to target folder 2024-01-23 13:30:01 +08:00
Mahavir Jain
e3d4b901f9 Merge branch 'bugfix/compilation_failed_in_bootloader_with_sb_fe_verbose' into 'master' 
fix(bootloader): Fix compilation issue in bootloader build during verbose+sb+fe

Closes IDF-6373

See merge request espressif/esp-idf!26339
 2024-01-23 13:29:02 +08:00
Aditya Patwardhan
4dc2ace0b7
fix(esp_hw_support): Update key manager support 
1) Added new Key Manager APIs
    2) Added crypto locking layer for Key Manager
    3) Remove support for deploying known key
    4) Format key manager support
    5) Fix build header error
    6) Updated the key_mgr_types.h file
    7) Added key manager tests
 2024-01-23 10:24:39 +05:30
Aditya Patwardhan
5a1726c18c
feat(hal): Update HAL layer for Key manager 
1)Added new clk related changes
 2024-01-23 10:24:37 +05:30
Aditya Patwardhan
3eabb62850
feat(esp_hw_support): Add support for Key Manager 2024-01-23 10:24:35 +05:30
wuzhenghui
9b3dc69908
refactor(esp_hw_support): move regdma structure defination to soc components 2024-01-23 11:51:44 +08:00
KonstantinKondrashov
b471d9d22c change(all): Clearing unused efuse rom headers 2024-01-22 18:02:55 +02:00
Song Ruo Jing
08eada7301 feat(esp_hw_support/dma2d): Add 2D-DMA support on ESP32P4 2024-01-22 20:51:43 +08:00
Mahavir Jain
9ecd2fd7e3 fix(soc): change debug addr range to CPU subsystem range 
For C6/H2/P4/C5, there is no SoC specific debug range. Instead the same
address range is part of CPU Subsystem range which contains debug mode
specific code and interrupt config registers (CLINT, PLIC etc.).

For now the PMP entry is provided with RWX permission for both machine
and user mode but we can save this entry and allow the access to only
machine mode for this range.

For P4/C5 case, this PMP entry can have RW permission as the debug mode
specific code is not present in this memory range.
 2024-01-22 13:34:32 +08:00
Xiao Xufeng
e0856e208e ci(flash): remove hpm-dc configs from octal flash 2024-01-22 12:44:27 +08:00
Omar Chebib
102d5bbf72 refactor(riscv): added a new API for the interrupts 2024-01-18 16:36:53 +08:00
nilesh.kale
59c5b5fe6b fix(bootloader): Fix compilation issue in bootloader build during verbose+sb+fe 2024-01-18 12:15:15 +05:30
Cao Sen Miao
6768805d20 fix(uart,usj...): Fix wrong serial number that has been parsed to rom functions, 
Closes https://github.com/espressif/esp-idf/issues/12958
 2024-01-18 10:51:51 +08:00
Ondrej Kosta
ce388a4111 feat(esp_eth): Added support of internal EMAC for ESP32P4 
Refactored internal EMAC DMA access.

Added MPLL acquire to manage access to the MPLL by multiple periphs.
 2024-01-16 14:29:25 +01:00
Armando
8f097a4629 feat(csi): added csi bridge share control code 2024-01-16 09:57:52 +08:00
Alexey Lapshin
ac2705b60a fix(hw_support): fix esp32p4 cpu stall/unstall 2024-01-15 23:25:07 +08:00
morris
ed8d805554 fix(dw_gdma): write back the link list items after creation 2024-01-15 16:56:28 +08:00
Lou Tian Hao
8bcac0bd7a Merge branch 'change/support_test_io_wakeup' into 'master' 
change(pm): change test_io_wakeup

See merge request espressif/esp-idf!28368
 2024-01-11 16:53:09 +08:00
Lou Tianhao
19f2149390 change(pm): change test_io_wakeup 2024-01-11 11:07:16 +08:00