alex/esp-idf
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27470afb7c
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60 Commits

Author SHA1 Message Date
wanlei
27470afb7c spi_master:fix error when use spi_bus_add_device more than 3 device 
update gpio_sig at `spics_out` array in each spi_periph.c of chips later than s2
then `spi_bus_add_device` can correctly distribute gpio_signals for cs_signal

Closes https://github.com/espressif/esp-idf/issues/8876
 2022-09-14 11:20:47 +08:00
wuzhenghui
9b7bed2243 Clean IRAM and DRAM address space conversion macros 2022-08-09 20:33:26 +08:00
wuzhenghui
62ac5364e0 Use the entire sharedbuffer space as the heap of the D/IRAM attribute 2022-08-09 20:27:38 +08:00
Jiang Jiang Jian
9f9021a221 Merge branch 'bugfix/multiple_adc_bugfix_v4.4' into 'release/v4.4' 
adc: fix multiple bugs (v4.4)

See merge request espressif/esp-idf!19142
 2022-08-04 14:42:53 +08:00
Armando
ad8862fa19 adc: fix esp32s2 continuous mode converted bytes issue 
When working in continuous mode, hardware will continuously trigger
ADC to do conversions. On esp32s2, 2 bytes will be generated per
conversion. Prior to this commit, driver assumes 4 bytes per conversion
(on s2). This commit fixed this issue.
 2022-07-20 16:43:38 +08:00
Jiang Jiang Jian
b9e018aa53 Merge branch 'bugfix/ledc_auto_clk_refactor_v4.4' into 'release/v4.4' 
LEDC: improved support for ESP32-C3 and refactored divisor calculation (v4.4)

See merge request espressif/esp-idf!17101
 2022-07-01 10:52:00 +08:00
Michael (XIAO Xufeng)
f86be6141b Merge branch 'bugfix/i2c_timeout_issue_v4.4' into 'release/v4.4' 
I2C: patch for solving watchdog timeout issue(backport v4.4)

See merge request espressif/esp-idf!18130
 2022-06-08 14:12:37 +08:00
Michael (XIAO Xufeng)
f46bd50884 pm: putting dbias and pd_cur code into same function 2022-06-05 02:33:51 +08:00
Jiang Jiang Jian
fc30369909 Merge branch 'bugfix/update_efuse_name_v4.4' into 'release/v4.4' 
efuse: update efuse name (backport v4.4)

See merge request espressif/esp-idf!18195
 2022-05-30 11:15:16 +08:00
Wu Zheng Hui
2e4784611d efuse: update efuse name (backport v4.4) 2022-05-30 11:15:16 +08:00
Cao Sen Miao
04f7c342f0 I2C: patch for solving watchdog timeout issue 2022-05-17 16:36:40 +08:00
Michael (XIAO Xufeng)
e119d6cb06 pm: add powerdown for int_8m on ESP32-H2 
Also move the xtal fpu logic to sleep_modes.c
 2022-05-16 00:59:36 +08:00
Michael (XIAO Xufeng)
21b80a969f soc: updated soc_caps about rtc_io and the format 2022-02-18 11:44:43 +08:00
Omar Chebib
63afc84de5 LEDC: improved support for ESP32-C3 and refactored divisor calculation 
As ESP32C3 does not have support for REF_TICK source clock, it is now not
possible to select it anymore.
Auto cfg clock has been improved for all boards.
 2022-02-10 16:54:00 +08:00
songruojing
b80a070395 esp_system: replace the range comparsion for reset reason in perip clk init with specific reset reason check, also add a test case in LEDC to check for the perip clk not being disabled after cpu reset 
(cherry picked from commit f57456e9dd919e5eea1d3cd0caa64b5c97a4df73)
 2022-01-27 09:51:00 +00:00
Armando
1ec46ad3b8 adc: support adc dma driver on all chips 2021-12-23 17:13:46 +08:00
Jiang Jiang Jian
f5ae8b0533 Merge branch 'feature/ledc_use_rtc8m_or_xtal_lightsleep' into 'master' 
support RTC8M and XTAL power domain in light sleep mode

Closes IDF-3419

See merge request espressif/esp-idf!15152
 2021-09-27 04:02:29 +00:00
morris
20ef511d0a Merge branch 'bugfix/fix_reg_name_charactor_err' into 'master' 
bugfix: fix reg name character error

See merge request espressif/esp-idf!14169
 2021-09-18 07:10:57 +00:00
Jiang Jiang Jian
3b48b7e663 Merge branch 'Fix/update_reset_reason' into 'master' 
update reset reason for c3/s3/h2

See merge request espressif/esp-idf!14747
 2021-09-18 07:03:50 +00:00
Wu Zheng Hui
85651b4791 efuse: remove DIS_RTC_RAM_BOOT efuse bit 2021-09-18 14:58:43 +08:00
Wu Zheng Hui
27241e8213 Merge branch 'bugfix/fix_efuse_err_address' into 'master' 
fix efuse err address in block0

See merge request espressif/esp-idf!14790
 2021-09-17 02:17:09 +00:00
Wu Zheng Hui
1080e4f6a2 rename APB_CTRL ro SYS_CON 
save
 2021-09-16 20:57:57 +08:00
wuzhenghui
61b2c2d458 fix h2 efuse err address in block0 2021-09-16 20:08:59 +08:00
Li Shuai
58292a7d22 Power Management: add XTAL power domain to control whether external 40MHz xtal is powered down during sleep 2021-09-16 14:43:43 +08:00
Li Shuai
f5b39a7cde esp_hw_support: No voltage drop during light sleep to ensure stable output clock of rtc8m oscillator 2021-09-16 14:40:46 +08:00
wuzhenghui
b2c028085a fix reg name character error 2021-09-15 21:51:20 +08:00
Armando (Dou Yiwen)
13b63cd9d2 Merge branch 'feature/support_adc_calibration_s3' into 'master' 
adc: support adc calibration on s3

Closes IDF-1950, IDF-3730, and IDF-3036

See merge request espressif/esp-idf!15031
 2021-09-14 08:51:03 +00:00
morris
502e132e5d Merge branch 'feature/fast_gpio_c3' into 'master' 
fast gpio support on esp32-c3

Closes IDF-3783

See merge request espressif/esp-idf!14986
 2021-09-14 06:09:34 +00:00
Armando
c45c6f52f1 adc: support adc efuse-based calibration on esp32s3 2021-09-14 11:42:50 +08:00
Li Shuai
e44ead5356 Power Management: add RTC8M power domain to control whether internal 8m oscillator is powered down during sleep 2021-09-13 17:36:54 +08:00
morris
6cec256a34 fast_gpio: driver support on esp32c3 2021-09-06 19:39:09 +08:00
Sachin Parekh
fd5a7df404 esp32h2: Replicated HMAC JTAG downstream enable mode implementation 2021-09-06 11:06:50 +05:30
morris
2e0ffbd543 Merge branch 'bugfix/fix-driver-8_16bit-reg-access' into 'master' 
bugfix/driver: fix and cleanup soc/ll stuffs

Closes IDF-3722

See merge request espressif/esp-idf!14829
 2021-08-30 10:27:05 +00:00
Michael (XIAO Xufeng)
d910d42a8d Merge branch 'bugfix/soc_interrupt_source' into 'master' 
soc: remove outdated description of interrupts on RISCV CPUs

See merge request espressif/esp-idf!14974
 2021-08-30 09:38:24 +00:00
Michael (XIAO Xufeng)
59cedcb748 soc: remove outdated description of interrupts on RISCV CPUs 2021-08-30 17:38:16 +08:00
SalimTerryLi
892f5e7df3
timer_group: fix wrongly generated reg header that introduced in 443845fd54 2021-08-30 13:51:25 +08:00
SalimTerryLi
874a720286
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one 
update all struct headers to be more "standardized":

- bit fields are properly wrapped with struct
- bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits
- bit field should be uint32_t
- typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199

added helper macros to force peripheral registers being accessed in 32 bitwidth

added a check script into ci
 2021-08-30 13:50:58 +08:00
wuzhenghui
32abe5ce42 fix apb freq err temporarily 2021-08-27 19:59:33 +08:00
sly
11dfd802e0 esp32h2: add rtc clock support 2021-08-26 11:25:39 +08:00
wuzhenghui
6ab495b4dc esp32h2: chip env support 
brownout init fixed
 2021-08-25 11:02:47 +08:00
morris
0c41837b06 Merge branch 'refactor/timer_group-reg_file-update' into 'master' 
refactor/timer_group update reg headers for c3 and s2

Closes IDF-3690

See merge request espressif/esp-idf!14761
 2021-08-23 04:30:59 +00:00
morris
bb87fd8f08 Merge branch 'refactor/pcnt_driver_esp32s3' into 'master' 
pcnt: soc update and hal refactor

See merge request espressif/esp-idf!14698
 2021-08-20 04:23:15 +00:00
SalimTerryLi
443845fd54
timer_group: update reg headers for c3&s2&h2 and fix direct 8/16bit reg access 2021-08-19 18:56:32 +08:00
wuzhenghui
f913a10a22 update reset reason for c3/s3/h2 2021-08-13 17:45:53 +08:00
morris
1656cee69d i2s: correct soc info 
1. remove non-exist I2S instance
2. update soc_caps.h, i2s_ll.h
 2021-08-10 21:06:59 +08:00
suda-morris
9920271c21 pcnt: update pcnt soc data for all targets 2021-08-10 17:19:21 +08:00
Michael (XIAO Xufeng)
947980ecac Merge branch 'bugfix/uart_set_pin_use_iomux' into 'master' 
uart: uart_set_pin function will now use IOMUX whenever possible

Closes IDF-3183

See merge request espressif/esp-idf!14318
 2021-08-05 04:17:29 +00:00
Omar Chebib
779e7400b0 uart: uart_set_pin function will now use IOMUX whenever possible 
By using IOMUX instead of GPIO Matrix for UART, it is now possible
on ESP32 boards to use the UART as a wake up source even if it is
not used as a console.
For other boards where this issue was not present, using IOMUX has
the advantage to be faster than using GPIO matrix, so a highest
baudrate can be used
 2021-08-04 12:48:30 +08:00
laokaiyao
3c57a6ac36 driver/i2s: refactor ll and hal 2021-08-04 10:20:03 +08:00
laokaiyao
d51b85989b doc/i2s: update i2s programming guide on s3 & c3 2021-08-04 10:20:03 +08:00